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TIBPAL22V10-5CFN PDF预览

TIBPAL22V10-5CFN

更新时间: 2024-11-24 21:15:23
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 时钟输入元件可编程逻辑
页数 文件大小 规格书
17页 168K
描述
OT PLD, 4ns, Bipolar, PQCC28, LCC-28

TIBPAL22V10-5CFN 技术参数

生命周期:Contact Manufacturer包装说明:QCCJ,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.72其他特性:PAL WITH MACROCELLS; 10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
最大时钟频率:117 MHzJESD-30 代码:S-PQCC-J28
JESD-609代码:e0长度:11.5062 mm
专用输入次数:11I/O 线路数量:10
端子数量:28最高工作温度:75 °C
最低工作温度:组织:11 DEDICATED INPUTS, 10 I/O
输出函数:MACROCELL封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装形状:SQUARE
封装形式:CHIP CARRIER可编程逻辑类型:OT PLD
传播延迟:4 ns座面最大高度:4.57 mm
最大供电电压:5.25 V最小供电电压:4.75 V
标称供电电压:5 V表面贴装:YES
技术:BIPOLAR温度等级:COMMERCIAL EXTENDED
端子面层:TIN LEAD端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
宽度:11.5062 mmBase Number Matches:1

TIBPAL22V10-5CFN 数据手册

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TIBPAL22V10-5C  
HIGH-PERFORMANCE IMPACT-XL PROGRAMMABLE ARRAY LOGIC CIRCUIT  
SRPS028A – MAY 1992 – REVISED OCTOBER 1993  
High-Performance Operation:  
(External Feedback) . . . 117 MHz  
FN PACKAGE  
(TOP VIEW)  
f
max  
Propagation Delay . . . 5 ns Max  
Increased Logic Power – Up to 22 Inputs  
and 10 Outputs  
4
3
2
1
28 27 26  
25  
5
I/O/Q  
GND  
I/O/Q  
I/O/Q  
GND  
I/O/Q  
Increased Product Terms – Average of 12  
Per Output  
6
24  
23  
22  
7
8
Variable Product Term Distribution  
Allows More Complex Functions to Be  
Implemented  
V
V
CC  
CC  
9
I/O/Q  
GND  
I/O/Q  
21 I/O/Q  
20 GND  
19 I/O/Q  
10  
11  
Each Output Is User Programmable for  
Registered or Combinational Operation,  
Polarity, and Output Enable Control  
12 13 14 15 16 17 18  
Power-Up Clear on Registered Outputs  
TTL-Level Preload for Improved Testability  
Extra Terms Provide Logical Synchronous  
Set and Asynchronous Reset Capability  
Fast Programming, High Programming  
Yield, and Unsurpassed Reliability Ensured  
Using Ti-W Fuses  
AC and DC Testing Done at the Factory  
Utilizing Special Designed-In Test Features  
JEDEC Approved Revolutionary Power and  
Ground Pinout for 28-Pin Chip Carrier  
Reduces Cross Talk and Ground Bounce  
JEDEC File Compatibility Allows Previous  
’22V10 Designs to be Programmed Into the  
TIBPAL22V10-5C Without Modifications  
description  
The TIBPAL22V10-5C is a programmable array logic device featuring high speed and functional equivalency  
when compared to presently available devices. The TIBPAL22V10-5C is implemented with the familiar  
sum-of-products (AND-OR) logic structure featuring programmable output logic macrocells. These  
IMPACT-XL circuits combine the latest Advanced Low-Power Schottky technology with proven titanium-  
tungsten fuses to provide reliable, high-performance substitutes for conventional TTL logic.  
This device contains up to 22 inputs and 10 outputs. It incorporates the unique capability of defining and  
programming the architecture of each output on an individual basis. Outputs can be registered or nonregistered  
and inverting or noninverting as shown in the output logic macrocell diagram. The ten potential outputs are  
enabled through the use of individual product terms.  
Further advantages can be seen in the introduction of variable product term distribution. This technique  
allocates from 8 to 16 logical product terms to each output for an average of 12 product terms per output. This  
variable allocation of terms allows far more complex functions to be implemented than in previously available  
devices.  
This device is covered by U.S. Patent 4,410,987.  
IMPACT-XL is a trademark of Texas Instruments Incorporated.  
PRODUCTION DATA information is current as of publication date.  
Copyright 1993, Texas Instruments Incorporated  
Products conform to specifications per the terms of Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
1

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