Obsolete Device
TIBPAL22VP10-20C, TIBPAL22VP10-25M
HIGH-PERFORMANCE IMPACT-Xꢀ™ PROGRAMMABLE ARRAY LOGIC CIRCUITS
SRPS013A − D2943, FEBRUARY 1987 − REVISED DECEMBER 2010
C SUFFIX . . . NT PACKAGE
M SUFFIX . . . JT PACKAGE
• Functionally Equivalent to the
TIBPAL22V10/10A, with Additional
Feedback Paths in the Output Logic
Macrocell
(TOP VIEW)
CLK/I
VCC
1
24
23
22
21
20
19
18
17
16
15
14
13
I
I
I
I
I
I
I
I
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I
2
• Choice of Operating Speeds:
TIBPAL22VP10-20C . . . 20 ns Max
TIBPAL22VP10-25M . . . 25 ns Max
3
4
5
• Variable Product Term Distribution
Allows More Complex Functions to Be
Implemented
6
7
8
9
• Each Output Is User Programmable for
Registered or Combinational Operation,
Polarity, and Output Enable Control
I
I
10
11
12
GND
• TTL-Level Preload for Improved Testability
• Extra Terms Provide Logical Synchronous
C SUFFIX . . . FN PACKAGE
M SUFFIX . . . FK PACKAGE
Set and Asynchronous Reset Capability
(TOP VIEW)
• Fast Programming, High Programming
Yield, and Unsurpassed Reliability Ensured
Using Ti-W Fuses
• AC and DC Testing Done at the Factory
4
3
2
1
28 27 26
25
5
6
7
8
9
I
I
I
I/O/Q
I/O/Q
I/O/Q
Utilizing Special Designed-In Test Features
24
23
• Dependable Texas Instruments Quality and
Reliability
NC
22 NC
I
I
I
• Package Options Include Plastic
21 I/O/Q
20 I/O/Q
19 I/O/Q
10
11
Dual-In-Line and Chip Carrier Packages
12 13 14 15 16 17 18
description
The TIBPAL22VP10’ is equivalent to the
TIBPAL22V10A but offers additional flexibility in
the output structure. The improved output
macrocell uses the registered outputs as inputs
when in a high-impedance condition. This
provides two additional output configurations for a
total of six possible macrocell configurations all of
which are shown in Figure 1.
NC − No internal connection
Pin assignments in operating mode
These devices contain up to 22 inputs and 10 outputs. They incorporate the unique capability of defining and
programming the architecture of each output on an individual basis. Outputs may be registered or nonregistered
and inverting or noninverting. In addition, the data may be fed back into the array from either the register or the
I/O port. The ten potential outputs are enabled through the use of individual product terms.
Further advantages can be seen in the introduction of variable product term distribution. This technique
allocates from 8 to 16 logical product terms to each output for an average of 12 product terms per output. This
variable allocation of terms allows far more complex functions to be implemented than in previously available
devices.
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PRODUCTION DATA information is current as of publication date.
Copyright © 2010, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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1