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TIBPAL22V10AMFK PDF预览

TIBPAL22V10AMFK

更新时间： 2024-11-02 22:05:39
品牌 Logo 应用领域
德州仪器 - TI 可编程逻辑输入元件时钟
页数 文件大小 规格书
17页 159K
描述
HIGH-PERFORMANCE IMPACT E PROGRAMMABLE ARRAY LOGIC CIRCUITS

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TIBPAL22V10AMFK 数据手册

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TIBPAL22V10C, TIBPAL22V10AC, TIBPAL22V10AM  
HIGH-PERFORMANCE IMPACT PROGRAMMABLE ARRAY LOGIC CIRCUITS  
SRPS024 – D2943, OCTOBER 1986 – REVISED MARCH 1992  
C SUFFIX . . . NT PACKAGE  
M SUFFIX . . . JT PACKAGE  
(TOP VIEW)  
•
•
Second-Generation PLD Architecture  
Choice of Operating Speeds  
TIBPAL22V10AC . . . 25 ns Max  
TIBPAL22V10AM . . . 30 ns Max  
TIBPAL22V10C . . . 35 ns Max  
CLK/I  
V
CC  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
I
I
I
I
I
I
I
I
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
I
2
3
•
•
•
Increased Logic Power – Up to 22 Inputs  
and 10 Outputs  
4
5
6
Increased Product Terms – Average of 12  
Per Output  
7
8
Variable Product Term Distribution  
Allows More Complex Functions to Be  
Implemented  
9
I
I
10  
11  
12  
GND  
•
Each Output Is User Programmable for  
Registered or Combinational Operation,  
Polarity, and Output Enable Control  
C SUFFIX . . . FN PACKAGE  
M SUFFIX . . . FK PACKAGE  
•
•
TTL-Level Preload for Improved Testability  
(TOP VIEW)  
Extra Terms Provide Logical Synchronous  
Set and Asynchronous Reset Capability  
•
Fast Programming, High Programming  
Yield, and Unsurpassed Reliability Ensured  
Using Ti-W Fuses  
4
3
2
1
28 27 26  
25  
5
I
I
I
I/O/Q  
I/O/Q  
I/O/Q  
6
24  
23  
7
•
•
•
AC and DC Testing Done at the Factory  
Utilizing Special Designed-In Test Features  
8
NC  
22 NC  
9
I
I
I
21 I/O/Q  
20 I/O/Q  
19 I/O/Q  
10  
11  
Dependable Texas Instruments Quality and  
Reliability  
12 13 14 15 16 17 18  
Package Options Include Both Plastic and  
Ceramic Chip Carriers in Addition to Plastic  
and Ceramic DIPs  
NC – No internal connection  
Pin assignments in operating mode  
•
Functionally Equivalent to AMDs  
AMPAL22V10 and AMPAL22V10A  
description  
The TIBPAL22V10 and TIBPAL22V10A are programmable array logic devices featuring high speed and  
functional equivalency when compared to presently available devices. They are implemented with the familiar  
sum-of-products (AND-OR) logic structure featuring the new concept “Programmable Output Logic Macrocell”.  
These IMPACT  
circuits combine the latest Advanced Low-Power Schottky technology with proven  
titanium-tungsten fuses to provide reliable, high-performance substitutes for conventional TTL logic.  
These devices contain up to 22 inputs and 10 outputs. They incorporate the unique capability of defining and  
programming the architecture of each output on an individual basis. Outputs may be registered or nonregistered  
and inverting or noninverting as shown in the output logic macrocell diagram. The ten potential outputs are  
enabled through the use of individual product terms.  
These devices are covered by U.S. Patent 4,410,987.  
IMPACT is a trademark of Texas Instruments Incorporated.  
PRODUCTION DATA information is current as of publication date.  
Copyright 1992, Texas Instruments Incorporated  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1
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