Datasheet > TDA9910HW/8/C1

TDA9910HW/8/C1

更新时间： 2024-01-17 08:50:20

品牌	Logo	应用领域
恩智浦 - NXP		转换器
页数	文件大小	规格书
21页	128K
描述
IC 1-CH 12-BIT RESISTANCE LADDER ADC, PARALLEL ACCESS, PQFP48, 7 X 7 MM, 1 MM HEIGHT, PLASTIC, SOT545-2, MS-026, HTQFP-48, Analog to Digital Converter

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技术参数
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TDA9910HW/8/C1 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	QFP	包装说明：	HTFQFP, QFP48,.35SQ,20
针数：	48	Reach Compliance Code：	unknown
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.81	Is Samacsys：	N
最大模拟输入电压：	5 V	转换器类型：	ADC, RESISTANCE LADDER
JESD-30 代码：	S-PQFP-G48	JESD-609代码：	e3
长度：	7 mm	模拟输入通道数量：	1
位数：	12	功能数量：	1
端子数量：	48	最高工作温度：	85 °C
最低工作温度：	-40 °C	输出位码：	BINARY, 2'S COMPLEMENT BINARY
输出格式：	PARALLEL, WORD	封装主体材料：	PLASTIC/EPOXY
封装代码：	HTFQFP	封装等效代码：	QFP48,.35SQ,20
封装形状：	SQUARE	封装形式：	FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH
电源：	3/3.3,5 V	认证状态：	Not Qualified
采样速率：	80 MHz	采样并保持/跟踪并保持：	TRACK
座面最大高度：	1.2 mm	子类别：	Analog to Digital Converters
标称供电电压：	5 V	表面贴装：	YES
温度等级：	INDUSTRIAL	端子面层：	TIN
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	QUAD	宽度：	7 mm
Base Number Matches：	1

TDA9910HW/8/C1 数据手册

TDA9910

12-bit, up to 80 Msample/s, Analog-to-Digital Converter (ADC)

direct/ultra high IF sampling

Rev. 04 — 12 June 2007

Product data sheet

1. General description

The TDA9910 is a 12-bit Analog-to-Digital Converter (ADC) optimized for direct Input

Frequency (IF) sampling, and supporting the most demanding use conditions in ultra high

IF radio transceivers for cellular infrastructure and other applications such as wireless

access system, optical networking and ﬁxed telecommunication. Thanks to its broadband

input capabilities, the TDA9910 is ideal for single and multiple carriers data conversion.

Operating at a maximum sampling rate of 80 Msample/s, analog input signals are

converted into 12-bit binary coded digital words. All static digital inputs are CMOS

compatible. All output signals are LVCMOS compatible. The TDA9910 offers the most

possible ﬂexible acquisition control system thanks to its programmable Complete

Conversion Signal (CCS) that allows to adjust the delay of the acquisition clock.

Thanks to its internal front-end buffer, the TDA9910 offers the lowest input capacitance

(< 1 pF) and therefore the highest ﬂexibility in front-end aliasing ﬁlter strategy.

2. Features

I 12-bit resolution

I Differential input with 375 MHz bandwidth

I 90 dB SFDR; 71 dB SNR (f_i= 225 MHz;

f_CLK= 80 Msample/s; B = 5 MHz)

I 70 dB SFDR; 66.5 dB SNR (f_i= 175 MHz;

f_CLK= 80 Msample/s; B = Nyquist)

I High-speed sampling rate up to 80 Msample/s

I Internal front-end buffer (input capacitance <1 pF)

I Programmable acquisition output clock (complete I Full-scale controllable from 1.5 V to 2 V (p-p);

conversion signal)

continuous scale

I Single 5 V power supply

I Binary or two’s-complement LVCMOS outputs

I Only 2 clock cycles latency

I HTQFP48 package

I 3.3 V LVCMOS compatible digital outputs

I CMOS compatible static digital inputs

I Industrial temperature range from −40 °C to +85 °C

3. Applications

I 2.5G and 3G cellular base infrastructure radio transceivers

I Wireless access systems

I Fixed telecommunication

I Optical networking

I Wireless Local Area Network (WLAN) infrastructure

12 3 4 5 6 7...21

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