TDA9950
CEC/I2C-bus translator
Rev. 02 — 22 October 2009
Product data sheet
1. General description
The TDA9950 is a single-chip CEC/I2C-bus translator with a processor, dedicated to the
control and interfacing of the Consumer Electronics Control (CEC), a feature of the
High-Definition Multimedia Interface (HDMI).
The TDA9950 is an interface between the CEC protocol and timings and the standard
I2C-bus. A message received on the I2C-bus interface is written in a buffer and sent on the
CEC line. A message received from the CEC line is stored in a buffer, and an interrupt is
generated indicating that a message can be read via the I2C-bus. To reduce its power
consumption the TDA9950 sets itself to Idle mode when there is no message on the CEC
line nor on the I2C-bus.
2. Features
2.1 Principal features
I Receive and transmit CEC messages with compliant Signal Free Time handling
I I2C-bus interface to host supporting 100 kbit/s and 400 kbit/s communication
I Supports multiple CEC logical addresses
I Supports CEC messages up to 16 bytes in length
I Programmable retry count
I Comprehensive arbitration and collision handling
I 3.0 V to 3.6 V VDD operating range
I Automatic Idle mode to reduce power consumption when there is no message on CEC
line and I2C-bus
I I/O pins are 5 V tolerant
2.2 Additional features
I Processor with embedded software to control the interface between CEC line and
I2C-bus
I Active-LOW reset input and on-chip power-on reset allows operation without external
reset components. A reset counter and reset glitch suppression circuitry prevent
spurious and incomplete resets.
I On-chip oscillator for 12 MHz crystal
I Schmitt trigger port inputs