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TC74VHCT32AFK PDF预览

TC74VHCT32AFK

更新时间: 2024-11-02 14:56:19
品牌 Logo 应用领域
东芝 - TOSHIBA /
页数 文件大小 规格书
7页 301K
描述
Quad 2-Input/OR, US14

TC74VHCT32AFK 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:SSOP包装说明:VSSOP,
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.84
系列:AHCT/VHCT/VTJESD-30 代码:R-PDSO-G14
长度:4 mm逻辑集成电路类型:OR GATE
功能数量:4输入次数:2
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:VSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
传播延迟(tpd):8.5 ns认证状态:Not Qualified
座面最大高度:1 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3 mm

TC74VHCT32AFK 数据手册

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TC74VHCT32AF/AFK  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74VHCT32AF, TC74VHCT32AFK  
Quad 2-Input OR Gate  
TC74VHCT32AF  
The TC74VHCT32A is an advanced high speed CMOS 2-INPUT OR  
2
GATE fabricated with silicon gate C MOS technology.  
It achieves the high speed operation similar to equivalent Bipolar Schottky  
TTL while maintaining the CMOS low power dissipation.  
The internal circuit is composed of 4 stages including buffer output, which  
provide high noise immunity and stable output.  
The input voltage are compatible with TTL output voltage.  
This device may be used as a level converter for interfacing 3.3 V to 5 V  
system.  
TC74VHCT32AFK  
Input protection and output circuit ensure that 0 to 5.5 V can be applied to  
(Note)  
the input and output  
pins without regard to the supply voltage. These  
structure prevents device destruction due to mismatched supply and  
input/output voltages such as battery back up, hot board insertion, etc.  
Note:  
V
CC  
= 0 V  
Features  
High speed: t = 3.8 ns (typ.) at V  
pd  
= 5 V  
CC  
Weight  
SOP14-P-300-1.27A:  
VSSOP14-P-0030-0.50:  
0.18 g (typ.)  
0.02 g (typ.)  
Low power dissipation: I  
= 2 μA (max) at Ta = 25°C  
CC  
Compatible with TTL inputs:  
V
V
= 0.8 V (max)  
= 2.0 V (min)  
IL  
IH  
Power down protection is provided on all inputs and outputs.  
  
Balanced propagation delays: t  
t
pHL  
  
pLH  
Low noise: V  
= 0.8 V (max)  
OLP  
Pin and function compatible with the 74 series (74AC/HC/F/ALS/LS etc.) 32 type.  
Start of commercial production  
1998-01  
© 2019  
2019-01-31  
1
Toshiba Electronic Devices & Storage Corporation  

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