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TC74VHCT367AF(EL) PDF预览

TC74VHCT367AF(EL)

更新时间: 2024-11-01 20:03:23
品牌 Logo 应用领域
东芝 - TOSHIBA 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
7页 191K
描述
IC,BUFFER/DRIVER,DUAL,2-BIT/4-BIT,AHCT/VHCT-CMOS,SOP,16PIN,PLASTIC

TC74VHCT367AF(EL) 技术参数

是否Rohs认证: 不符合生命周期:End Of Life
包装说明:SOP, SOP16,.3Reach Compliance Code:unknown
风险等级:5.87控制类型:ENABLE LOW
JESD-30 代码:R-PDSO-G16负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.008 A
位数:6功能数量:2
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL电源:5 V
Prop。Delay @ Nom-Sup:9.5 ns认证状态:Not Qualified
子类别:Bus Driver/Transceivers标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
Base Number Matches:1

TC74VHCT367AF(EL) 数据手册

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TC74VHCT367AF/AFT  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74VHCT367AF,TC74VHCT367AFT  
Hex Bus Buffer  
TC74VHCT367AF/AFT  
Non-Inverted,  
3-State Outputs  
TC74VHCT367AF  
The TC74VHCT367A is advanced high speed CMOS HEX BUS  
BUFFERs fabricated with silicon gate C2MOS technology.  
They achieve the high speed operation similar to equivalent  
Bipolar Schottky TTL while maintaining the CMOS low power  
dissipation.  
They contain six buffers ;four buffers are controlled by an  
enable input ( G1 ), and the other two buffers are controlled by  
another enable input (G2 ). The outputs of each buffer group are  
enabled when G1 and/or G2 inputs are held low; if held high,  
these outputs are in a high impedance state.  
TC74VHCT367AFT  
The TC74VHCT367A is a non-inverting output type.  
Input protection and output circuit ensure that 0 to 5.5 V can  
be applied to the input and output (Note) pins without regard to  
the supply voltage. These structure prevents device destruction  
due to mismatched supply and input/output voltages such as  
battery back up, hot board insertion, etc.  
Weight  
SOP16-P-300-1.27A:  
Note:  
Output in off-state  
0.18 g (typ.)  
TSSOP16-P-0044-0.65A: 0.06 g (typ.)  
Features  
High speed: t = 4.7 ns (typ.) at V  
= 5 V  
pd  
CC  
Low power dissipation: I  
= 4 μA (max) at Ta = 25°C  
CC  
Compatible with TTL inputs:  
V
V
= 0.8 V (max)  
= 2.0 V (min)  
IL  
IH  
Power down protection is provided on all inputs and outputs.  
Balanced propagation delays: t t  
pLH  
pHL  
Low noise: V  
= 0.8 V (max)  
OLP  
Pin and function compatible with the 74 series  
(74AC/HC/F/ALS/LS etc.) 367 type.  
1
2012-02-29  

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