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SY87701LHGTR PDF预览

SY87701LHGTR

更新时间： 2024-11-13 20:27:07
品牌 Logo 应用领域
美国微芯 - MICROCHIP ATM异步传输模式电信电信集成电路
页数 文件大小 规格书
14页 151K
描述
Clock Recovery Circuit, 1-Func, PQFP32, LEAD FREE, TQFP-32

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SY87701LHGTR 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：QFP
包装说明：HTQFP, TQFP32,.35SQ,32针数：32
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：5.82Is Samacsys：N
应用程序：ATM;SDH;SONETJESD-30 代码：S-PQFP-G32
JESD-609代码：e4长度：7 mm
湿度敏感等级：3功能数量：1
端子数量：32最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：HTQFP封装等效代码：TQFP32,.35SQ,32
封装形状：SQUARE封装形式：FLATPACK, HEAT SINK/SLUG, THIN PROFILE
峰值回流温度（摄氏度）：260电源：3.3 V
认证状态：Not Qualified座面最大高度：1.2 mm
子类别：ATM/SONET/SDH ICs最大压摆率：0.23 mA
标称供电电压：3.3 V表面贴装：YES
电信集成电路类型：ATM/SONET/SDH CLOCK RECOVERY CIRCUIT温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.8 mm端子位置：QUAD
处于峰值回流温度下的最长时间：40宽度：7 mm
Base Number Matches：1

SY87701LHGTR 数据手册

 浏览型号SY87701LHGTR的Datasheet PDF文件第2页浏览型号SY87701LHGTR的Datasheet PDF文件第3页浏览型号SY87701LHGTR的Datasheet PDF文件第4页浏览型号SY87701LHGTR的Datasheet PDF文件第5页浏览型号SY87701LHGTR的Datasheet PDF文件第6页浏览型号SY87701LHGTR的Datasheet PDF文件第7页 
3.3V 32-1250Mbps AnyRate®  
CLOCK AND DATA RECOVERY  
L  
SY87701L  
Use lower-power SY87701AL for new designs  
DESCRIPTION  
FEATURES  
■ Industrial temperature range (–40°C to +85°C)  
■ 3.3V power supply  
The SY87701L is a complete Clock Recovery and Data  
Retiming integrated circuit for data rates from 32Mbps  
up to 1.25Gbps NRZ. The device is ideally suited for  
SONET/SDH/ATM and Fibre Channel applications and  
other high-speed data transmission systems.  
Clock recovery and data retiming is performed by  
synchronizing the on-chip VCO directly to the incoming  
data stream. The VCO center frequency is controlled by  
the reference clock frequency and the selected divide  
ratio. On-chip clock generation is performed through the  
use of a frequency multiplier PLL with a byte rate source  
as reference.  
■ Clock and data recovery from 32Mbps up to  
1.25Gbps NRZ data stream, clock generation from  
32Mbps to 1.25Gbps  
■ Complies with Bellcore, ITU/CCITT and ANSI  
specifications for applications such as OC-1, OC-3,  
OC-12, ATM, FDDI, Fibre Channel and Gigabit  
Ethernet as well as proprietary applications  
■ Two on-chip PLLs: one for clock generation and  
another for clock recovery  
The SY87701L also includes a link fault detection  
circuit.  
All support documentation can be found on Micrel’s web  
site at www.micrel.com.  
■ Selectable reference frequencies  
■ Differential PECL high-speed serial I/O  
■ Line receiver input: no external buffering needed  
■ Link fault indication  
■ 100k ECL compatible I/O  
APPLICATIONS  
■ Available in 32-pin EPAD-TQFP and 28-pin SOIC  
packages (28-pin SOIC is available, but NOT  
recommended for new designs.)  
■ SONET/SDH/ATM OC-1, OC-3, OC-12, OC-24  
■ Fibre Channel, Escon, SMPTE 259  
■ Gigabit Ethernet/Fast Ethernet  
■ Proprietary architecture up to 1.25Gbps  
BLOCK DIAGRAM  
PLLR P/N  
RDOUTP  
(PECL)  
RDINP  
(PECL)  
RDINN  
PHASE  
DETECTOR  
RDOUTN  
RCLKP  
(PECL)  
0
1
CHARGE  
PUMP  
VCO  
RCLKN  
PHASE/  
FREQUENCY  
DETECTOR  
LINK  
FAULT  
DETECTOR  
LFIN  
(TTL)  
CD  
(PECL)  
REFCLK  
(TTL)  
PHASE/  
FREQUENCY  
DETECTOR  
CHARGE  
PUMP  
VCO  
TCLKP  
(PECL)  
1
0
TCLKN  
V
V
V
CC  
DIVIDER  
BY 8, 10, 16, 20  
CCA  
CCO  
SY87701L  
GND  
DIVSEL 1/2  
(TTL)  
FREQSEL 1/2/3  
(TTL)  
PLLS P/N  
CLKSEL  
(TTL)  
AnyRate is a registered trademark of Micrel, Inc.  
Rev.: G  
Amendment:/0  
M9999-111506  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: Novembe2006  
1234567...14

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