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SY87702LHGTR PDF预览

SY87702LHGTR

更新时间: 2024-02-09 14:04:00
品牌 Logo 应用领域
麦瑞 - MICREL ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式时钟
页数 文件大小 规格书
14页 112K
描述
3.3V 28Mbps-2.5Gbps AnyRate CLOCK AND DATA RECOVERY

SY87702LHGTR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFP包装说明:HTFQFP, TQFP64,.47SQ
针数:64Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.92
应用程序:ATM;SDH;SONETJESD-30 代码:S-PQFP-G64
JESD-609代码:e0长度:10 mm
湿度敏感等级:3功能数量:1
端子数量:64最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:HTFQFP封装等效代码:TQFP64,.47SQ
封装形状:SQUARE封装形式:FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH
电源:3.3 V认证状态:Not Qualified
座面最大高度:1.2 mm子类别:ATM/SONET/SDH ICs
标称供电电压:3.3 V表面贴装:YES
电信集成电路类型:ATM/SONET/SDH CLOCK RECOVERY CIRCUIT温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
宽度:10 mmBase Number Matches:1

SY87702LHGTR 数据手册

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3.3V 28Mbps-2.5Gbps AnyRate®  
CLOCK AND DATA RECOVERY  
L  
SY87702L  
FEATURES  
DESCRIPTION  
3.3V power supply  
The SY87702L is a complete Clock Recovery and Data  
retiming integrated circuit for data rates from 28Mbps up to  
2.5Gbps NRZ. The device is ideally suited for SONET/SDH/  
ATM, Fibre Channel, and Gigabit Ethernet applications, as  
well as other high-speed data transmission applications.  
Clock recovery and data retiming is performed by  
synchronizing the on-chip VCO directly to the incoming data  
stream. The VCO center frequency is controlled by the  
reference clock frequency and the selected divide ratio. On-  
Complies with Bellcore, ITU/CCITT and ANSI  
specifications for applications such as OC-1, OC-3,  
OC-12, OC-48*, and ATM  
Compatible with FDDI, Gigabit Ethernet, Fibre  
Channel, 2X Fibre Channel, SMPTE 259 and 292, and  
proprietary applications  
Low power  
Clock and data recovery from 28Mbps up to 2.5Gbps chip clock generation is performed through the use of a  
NRZ data stream  
frequency multiplier PLL and can be used as a Clock  
Multiplier Unit (CMU). The integrated CMU can provide this  
clock signal at the TCLK outputs. Additionally, the TCLK  
output can be selected to provide a copy of the RCLK  
frequency.  
For SONET/SDH applications, the SY87702L includes a  
Link Fault Detection circuit. This circuit, enabled by the output  
of an optical module driving the CD input low, causes the  
recovery PLL of the SY87702L to lock to the reference  
clock's multiplied frequency under Loss-of-Signal conditions.  
This low jitter clock is provided at the RCLK outputs and is  
at the same frequency as that provided at the TCLK output.  
Selectable reference frequencies via programmable  
multiplier  
Differential PECL and CML high-speed serial outputs  
Line receiver input: no external buffering needed  
Link fault indication  
100K ECL compatible I/O  
Available in 64-Pin EP-TQFP package  
*Meets OC-48 Jitter Tolerance and Transfer  
APPLICATIONS  
Transponders and section repeaters  
Multiplexer's: access, add drop (ADM), and terminal  
(TM)  
SONET/SDH/ATM: -based transmission systems,  
modules, and test equipment  
Terabit routers and broadband cross-connects  
Fibre optic test equipment  
HDTV switching and transmission  
®
AnyRate is a registered trademark of Micrel, Inc.  
Rev.: C  
Amendment:/0  
M9999-102405  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: October 2005  

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