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SY87721LHITR PDF预览

SY87721LHITR

更新时间: 2024-01-17 13:27:12
品牌 Logo 应用领域
麦瑞 - MICREL 时钟
页数 文件大小 规格书
15页 162K
描述
3.3V 28Mbps-2.7Gbps ANYRATE CLOCK AND DATA RECOVERY WITH INTEGRATED CLOCK MULTIPLIER UNIT

SY87721LHITR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFP
包装说明:HTFQFP, TQFP64,.47SQ针数:64
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.82Is Samacsys:N
应用程序:ATM;SDH;SONETJESD-30 代码:S-PQFP-G64
长度:10 mm功能数量:1
端子数量:64最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:HTFQFP封装等效代码:TQFP64,.47SQ
封装形状:SQUARE封装形式:FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:ATM/SONET/SDH ICs最大压摆率:0.45 mA
标称供电电压:3.3 V表面贴装:YES
电信集成电路类型:ATM/SONET/SDH CLOCK RECOVERY CIRCUIT温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10 mmBase Number Matches:1

SY87721LHITR 数据手册

 浏览型号SY87721LHITR的Datasheet PDF文件第2页浏览型号SY87721LHITR的Datasheet PDF文件第3页浏览型号SY87721LHITR的Datasheet PDF文件第4页浏览型号SY87721LHITR的Datasheet PDF文件第5页浏览型号SY87721LHITR的Datasheet PDF文件第6页浏览型号SY87721LHITR的Datasheet PDF文件第7页 
3.3V 28Mbps-2.7Gbps AnyRate®  
L  
CLOCK AND DATA RECOVERY WITH  
INTEGRATED CLOCK MULTIPLIER UNIT  
SY87721L  
DESCRIPTION  
FEATURES  
Recovers any data and clock from 28Mbps to  
2.7Gbps  
The SY87721L is a complete Clock Recovery and Data  
retiming integrated circuit for data rates from 28Mbps up to  
2.7Gbps NRZ including SONET FEC data rates. Included  
in the device, is a fully integrated Clock Multiplier Unit (CMU)  
that is capable of generating frequencies that cover the  
same data rate range as the CDR. The device is ideally  
suited for SONET/SDH/ATM, Fibre Channel, and Gigabit  
Ethernet applications, as well as other high-speed data  
transmission applications.  
• OC-1, OC-3, OC-12, OC-48, ATM  
• Gigabit Ethernet, Fast Ethernet  
• Fibre Channel, 2x Fibre Channel  
• P1394, Infiniband  
• SMPTE-259, SMPTE-292  
• Proprietary optical transport  
Integrated clock multiplier unit with low jitter  
Clock recovery and data retiming is performed by  
synchronizing the on-chip VCO directly to the incoming data  
stream. The VCO center frequency is controlled by the  
reference clock frequency and the selected divide ratio.  
On-chip clock generation is performed through the use of a  
frequency multiplier PLL with a byte rate or code group rate  
source as reference.  
generation  
Complies with Bellcore, ITU/CCITT and ANSI  
specifications  
Selectable mux for pass through; avoids jitter  
accumulation when switching through backplanes  
Available in 64-Pin EPAD-TQFP package  
SIMPLIFIED BLOCK DIAGRAM  
APPLICATIONS  
SONET/SDH/ATM-based transmission systems,  
SY87721L  
modules, and test equipment  
AnyRate  
Data Out  
Transponders and section repeaters  
AnyRate  
Data In  
Multiplexers: access, add drop (ADM), and terminal (TM)  
Terabit routers and broadband cross-connects  
Fiber optic test equipment  
2
CDR  
CMU  
2
2
Recovered  
Clock  
Reference  
Clock  
2
2
Transmit  
Clock  
AnyRate is a registered trademark of Micrel, Inc.  
Rev.: B  
Amendment:/0  
M9999-072705  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: July 2005  

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