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SY87701VHH PDF预览

SY87701VHH

更新时间: 2024-11-13 02:55:19
品牌 Logo 应用领域
麦瑞 - MICREL 时钟
页数 文件大小 规格书
15页 151K
描述
5V/3.3V 32-1250Mbps AnyRate CLOCK AND DATA RECOVERY

SY87701VHH 数据手册

 浏览型号SY87701VHH的Datasheet PDF文件第2页浏览型号SY87701VHH的Datasheet PDF文件第3页浏览型号SY87701VHH的Datasheet PDF文件第4页浏览型号SY87701VHH的Datasheet PDF文件第5页浏览型号SY87701VHH的Datasheet PDF文件第6页浏览型号SY87701VHH的Datasheet PDF文件第7页 
5V/3.3V 32-1250Mbps AnyRate®  
CLOCK AND DATA RECOVERY  
SY87701V  
FEATURES  
3.3V and 5V power supply options  
®
AnyRate  
Clock and data recovery from 32Mbps up to  
1.25Gbps NRZ data stream, clock generation from  
32Mbps to 1.25Gbps  
DESCRIPTION  
Complies with Bellcore, ITU/CCITT and ANSI  
specifications for applications such as OC-1, OC-3,  
OC-12, ATM, FDDI, Fibre Channel and Gigabit  
Ethernet, as well as proprietary applications  
The SY87701V is a complete Clock Recovery and Data  
Retiming integrated circuit for data rates from 32Mbps  
up to 1.25Gbps NRZ. The device is ideally suited for  
SONET/SDH/ATM and Fibre Channel applications and  
other high-speed data transmission systems.  
Clock recovery and data retiming is performed by  
synchronizing the on-chip VCO directly to the incoming  
data stream. The VCO center frequency is controlled by  
the reference clock frequency and the selected divide  
ratio. On-chip clock generation is performed through the  
use of a frequency multiplier PLL with a byte rate source  
as reference.  
Two on-chip PLLs: one for clock generation and  
another for clock recovery  
Selectable reference frequencies  
Differential PECL high-speed serial I/O  
Line receiver input: no external buffering needed  
Link fault indication  
100K ECL compatible I/O  
The SY87701V also includes a link fault detection  
circuit.  
Data sheets and support documentation can be found on  
Micrel’s web site at: www.micrel.com.  
Available in 32-pin EPAD-TQFP and 28-pin SOIC  
packages (28-pin SOIC is available, but not  
recommended for new designs)  
APPLICATIONS  
SONET/SDH/ATM OC-1, OC-3, OC-12, OC-24  
Fibre Channel, Escon, SMPTE 259  
Gigabit Ethernet/Fast Ethernet  
Proprietary architecture up to 1.25Gbps  
BLOCK DIAGRAM  
PLLR P/N  
RDOUTP  
(PECL)  
RDINP  
(PECL)  
RDINN  
PHASE  
DETECTOR  
RDOUTN  
RCLKP  
(PECL)  
0
1
CHARGE  
PUMP  
VCO  
RCLKN  
PHASE/  
FREQUENCY  
DETECTOR  
LINK  
FAULT  
DETECTOR  
LFIN  
(TTL)  
CD  
(PECL)  
REFCLK  
(TTL)  
PHASE/  
FREQUENCY  
DETECTOR  
CHARGE  
PUMP  
VCO  
TCLKP  
(PECL)  
1
0
TCLKN  
V
V
V
CC  
DIVIDER  
BY 8, 10, 16, 20  
CCA  
CCO  
SY87701V  
GND  
DIVSEL 1/2  
(TTL)  
FREQSEL 1/2/3  
(TTL)  
PLLS P/N  
CLKSEL  
(TTL)  
AnyRate is a registered trademark of Micrel, Inc.  
Rev.: M  
Amendment:/0  
M9999-111406  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: November 2006  

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