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SY100EL57ZGTR PDF预览

SY100EL57ZGTR

更新时间: 2024-11-30 03:08:55
品牌 Logo 应用领域
麦瑞 - MICREL 复用器逻辑集成电路光电二极管
页数 文件大小 规格书
5页 55K
描述
4:1 DIFFERENTIAL MULTIPLEXER

SY100EL57ZGTR 数据手册

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7  
SY10EL577  
SY100EL57  
4:1 DIFFERENTIAL  
MULTIPLEXER  
FEATURES  
DESCRIPTION  
Useful as either 4:1 or 2:1 multiplexer  
VBB output for single-ended operation  
75Kinternal input pulldown resistors  
Available in 150 mil 16-pin SOIC package  
The SY10/100EL57 are fully differential 4:1 multiplexers.  
By leaving the SEL1 line open (pulled LOW via the input  
pulldown resistors) the device can also be used as a  
differential 2:1 multiplexer with SEL0 input selecting between  
D0 and D1. The fully differential architecture of the EL57  
makes it ideal for use in low skew applications such as  
clock distribution.  
The SEL1 is the most significant select line. The binary  
number applied to the select inputs will select the same  
numbered data input (i.e., 00 selects D0).  
Multiple VBB outputs are provided for single-ended or  
AC coupled interfaces. In these scenarios, the VBB output  
should be connected to the data bar inputs and bypassed  
via a 0.01µF capacitor to ground. Note that the VBB output  
can source/sink up to 0.5mA of current without upsetting  
the voltage level.  
PIN NAMES  
TRUTH TABLE  
Pin  
Function  
Differential Data Inputs  
Mux Select Inputs  
Reference Outputs  
Data Outputs  
SEL1  
SEL0  
DATA OUT  
D0-3  
SEL0, 1  
VBB1, 2  
Q
L
L
L
H
L
D0  
D1  
D2  
D3  
H
H
H
Rev.: G  
Amendment: /0  
M9999-031006  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: March 2006  

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