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SST49LF016C-33-4C-WHE-T PDF预览

SST49LF016C-33-4C-WHE-T

更新时间: 2024-10-27 15:52:59
品牌 Logo 应用领域
美国微芯 - MICROCHIP 光电二极管内存集成电路
页数 文件大小 规格书
43页 4465K
描述
SST49LF016C-33-4C-WHE-T

SST49LF016C-33-4C-WHE-T 技术参数

是否Rohs认证:符合生命周期:Obsolete
包装说明:TSSOP, TSSOP32,.56,20Reach Compliance Code:compliant
风险等级:5.77Is Samacsys:N
最长访问时间:11 ns启动块:TOP
命令用户界面:YES数据轮询:NO
JESD-30 代码:R-PDSO-G32内存密度:16777216 bit
内存集成电路类型:FLASH内存宽度:8
部门数/规模:1,2,1,31端子数量:32
字数:2097152 words字数代码:2000000
最高工作温度:85 °C最低工作温度:
组织:2MX8封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP32,.56,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行:PARALLEL电源:3.3 V
认证状态:Not Qualified就绪/忙碌:YES
部门规模:16K,8K,32K,64K最大待机电流:0.0001 A
子类别:Flash Memories最大压摆率:0.018 mA
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL切换位:NO
类型:NOR TYPEBase Number Matches:1

SST49LF016C-33-4C-WHE-T 数据手册

 浏览型号SST49LF016C-33-4C-WHE-T的Datasheet PDF文件第2页浏览型号SST49LF016C-33-4C-WHE-T的Datasheet PDF文件第3页浏览型号SST49LF016C-33-4C-WHE-T的Datasheet PDF文件第4页浏览型号SST49LF016C-33-4C-WHE-T的Datasheet PDF文件第5页浏览型号SST49LF016C-33-4C-WHE-T的Datasheet PDF文件第6页浏览型号SST49LF016C-33-4C-WHE-T的Datasheet PDF文件第7页 
Obsolete Device  
Please contact Microchip Sales for replacement information.  
16 Mbit LPC Serial Flash  
SST49LF016C  
EOL Data Sheet  
The SST49LF016C flash memory device is designed to interface with host con-  
trollers (chipsets) that support a low pin-count (LPC) interface for system firmware  
applications. Complying with LPC Interface Specification 1.1, SST49LF016C sup-  
ports a Burst-Read data transfer of 15.6 MBytes per second at 33 MHz clock  
speed and 31.2 MBytes per second at 66 MHz clock speed, up to 128 bytes in a  
single operation  
Features  
• Operational Clock Frequency  
• Security ID Feature  
– 33 MHz  
– 256-bit Secure ID space  
– 66 MHz  
- 64-bit Unique Factory Pre-programmed Device Identi-  
fier  
• Organized as 2M x8  
- 192-bit User-Programmable OTP  
• Superior Reliability  
• Conforms to LPC Interface Specification v1.1  
– Endurance: 100,000 Cycles (typical)  
– Greater than 100 years Data Retention  
– Support Multi-Byte Firmware Memory Read/Write  
Cycles  
• Low Power Consumption  
• Single 3.0-3.6V Read and Write Operations  
• LPC Mode  
– Active Read Current: 12 mA (typical)  
– Standby Current: 10 µA (typical)  
– 5-signal LPC bus interface for both in-system and fac-  
tory programming using programmer equipment  
– Multi-Byte Read data transfer rate  
15.6 MB/s @ 33 MHz PCI clock and  
31.2 MB/s @ 66 MHz clock  
• Uniform 4 KByte sectors  
– 35 Overlay Blocks: one 16-KByte Boot Block, two 8-  
KByte Parameter Blocks, one 32-Kbyte Parameter  
Block, thirty-one 64-KByte Main Blocks.  
- Firmware Memory Read cycle supporting  
1, 2, 4, 16, and 128 Byte Read  
• Fast Sector-Erase/Program Operation  
- Firmware Memory Write cycle supporting  
1, 2, and 4 Byte Write  
– Sector-Erase Time: 18 ms (typical)  
– Block-Erase Time: 18 ms (typical)  
– Program Time: 7 µs (typical)  
– 33 MHz/66 MHz clock frequency operation  
– WP#/AAI and TBL# pins provide hardware Write protect  
for entire chip and/or top Boot Block  
– Block Locking Registers for individual block Read-Lock,  
Write-Lock, and Lock-Down protection  
– 5 GPI pins for system design flexibility  
– 4 ID pins for multi-chip selection  
• Auto Address Increment (AAI) for Rapid Factory  
Programming (High Voltage Enabled)  
– RY/BY# pin for End-of-Write detection  
– Multi-Byte Program  
– Multi-Byte capability registers  
– Chip Rewrite Time: 4 seconds (typical)  
(read-only registers)  
• Packages Available  
– Status register for End-of-Write detection  
– Program-/Erase-Suspend  
– 32-lead PLCC  
– 32-lead TSOP (8mm x 14mm)  
– 40-lead TSOP (10mm x 20mm)  
Read or Write to other blocks during  
Program-/Erase-Suspend  
• All devices are RoHS compliant  
• Two-cycle Command Set  
www.microchip.com  
©2016  
DS20005029B  
02/16  

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