2 Mbit LPC Flash
SST49LF020A
SST49LF020A2Mb LPC Flash
Data Sheet
FEATURES:
•
LPC Interface Flash
•
Two Operational Modes
– SST49LF020A: 256K x8 (2 Mbit)
Conforms to Intel LPC Interface Specification 1.0
Flexible Erase Capability
– Low Pin Count (LPC) Interface mode for
in-system operation
– Parallel Programming (PP) Mode for fast production
programming
LPC Interface Mode
– 5-signal communication interface supporting
byte Read and Write
– 33 MHz clock frequency operation
– WP# and TBL# pins provide hardware write protect
for entire chip and/or top boot block
– Standard SDP Command Set
– Data# Polling and Toggle Bit for End-of-Write
detection
– 5 GPI pins for system design flexibility
– 4 ID pins for multi-chip selection
Parallel Programming (PP) Mode
•
•
– Uniform 4 KByte Sectors
•
– Uniform 16 KByte overlay blocks
– Top Boot Block protection: 16 KByte
– Chip-Erase for PP Mode Only
Single 3.0-3.6V Read and Write Operations
Superior Reliability
•
•
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
•
•
Low Power Consumption
– Active Read Current: 6 mA (typical)
– Standby Current: 10 µA (typical)
•
Fast Sector-Erase/Byte-Program Operation
– 11-pin multiplexed address and 8-pin data
I/O interface
– Supports fast programming In-System on
programmer equipment
– Sector-Erase Time: 18 ms (typical)
– Block-Erase Time: 18 ms (typical)
– Chip-Erase Time: 70 ms (typical)
– Byte-Program Time: 14 µs (typical)
– Chip Rewrite Time: 4 seconds (typical)
– Single-pulse Program or Erase
– Internal timing generation
•
•
CMOS and PCI I/O Compatibility
Packages Available
– 32-lead PLCC
– 32-lead TSOP (8mm x 14mm)
•
All non-Pb (lead-free) devices are RoHS compliant
PRODUCT DESCRIPTION
The SST49LF020A flash memory device is designed to
interface with the LPC bus for PC and Internet Appliance
application in compliance with Intel Low Pin Count (LPC)
Interface Specification 1.0. Two interface modes are sup-
ported: LPC mode for in-system operations and Parallel
Programming (PP) mode to interface with programming
equipment.
has a shorter erase time; the total energy consumed during
any Erase or Program operation is less than alternative
flash memory technologies. The SST49LF020A product
provides a maximum Byte-Program time of 20 µsec. The
entire memory can be erased and programmed byte-by-
byte typically in 4 seconds when using status detection fea-
tures such as Toggle Bit or Data# Polling to indicate the
completion of Program operation. The SuperFlash technol-
ogy provides fixed Erase and Program time, independent
of the number of Erase/Program cycles that have per-
formed. Therefore the system software or hardware does
not have to be calibrated or correlated to the cumulative
number of Erase cycles as is necessary with alternative
flash memory technologies, whose Erase and Program
time increase with accumulated Erase/Program cycles.
The SST49LF020A flash memory device is manufactured
with SST’s proprietary, high-performance SuperFlash
Technology. The split-gate cell design and thick-oxide tun-
neling injector attain better reliability and manufacturability
compared with alternate approaches. The SST49LF020A
device significantly improves performance and reliability,
while lowering power consumption. The SST49LF020A
device writes (Program or Erase) with a single 3.0-3.6V
power supply. It uses less energy during Erase and Pro-
gram than alternative flash memory technologies. The total
energy consumed is a function of the applied voltage, cur-
rent and time of application. For any give voltage range, the
SuperFlash technology uses less current to program and
To meet high density, surface mount requirements, the
SST49LF020A device is offered in 32-lead TSOP and 32-
lead PLCC packages. See Figures 2 and 3 for pin assign-
ments and Table 1 for pin descriptions.
©2006 Silicon Storage Technology, Inc.
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.
Intel is a registered trademark of Intel Corporation.
S71206-08-000
1
5/06
These specifications are subject to change without notice.
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