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SST27VF020

更新时间： 2024-11-08 03:09:51
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页数 文件大小 规格书
18页 587K
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1 Mbit / 2 Mbit (x8) Many-Time Programmable Flash

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SST27VF020 数据手册

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1 Mbit / 2 Mbit (x8) Many-Time Programmable Flash  
SST27VF010 / SST27VF020  
SST27VF010 / 0205.0V-Read 1Mb / 2Mb (x8) MTP flash memories  
Preliminary Specifications  
FEATURES:  
•
•
•
Organized as 128K x8 / 256K x8  
2.7-3.6V Read Operation  
Superior Reliability  
– Endurance: At least 1000 Cycles  
– Greater than 100 years Data Retention  
•
•
Fast Byte-Program Operation  
– Byte-Program Time: 15 µs (typical)  
– Chip Program Time:  
2 seconds (typical) for SST27VF010  
4 seconds (typical) for SST27VF020  
Electrical Erase Using Programmer  
– Does not require UV source  
– Chip-Erase Time: 100 ms (typical)  
•
•
Low Power Consumption  
– Active Current: 20 mA (typical)  
– Standby Current: 2 µA (typical)  
•
•
JEDEC Standard Byte-wide EPROM Pinouts  
Packages Available  
– 32-lead PLCC  
– 32-lead TSOP (8mm x 14mm)  
– 32-pin PDIP  
Fast Read Access Time  
– 70 ns (PLCC or TSOP)  
– 90 ns (PDIP)  
PRODUCT DESCRIPTION  
The SST27VF010/020 are 128K x8 / 256K x8 CMOS,  
Many-Time Programmable (MTP) low cost flash, manufac-  
tured with SST’s proprietary, high-performance SuperFlash  
technology. The split-gate cell design and thick-oxide tun-  
neling injector attain better reliability and manufacturability  
compared with alternate approaches. These MTP devices  
can be electrically erased and programmed at least 1000  
times using an external programmer with a 12V power sup-  
ply. They have to be erased prior to programming. These  
devices conform to JEDEC standard pinouts for byte-wide  
memories.  
Device Operation  
The SST27VF010/020 are a low cost flash solution that  
can be used to replace existing UV-EPROM, OTP, and  
mask ROM sockets. These devices are functionally  
(read and program) and pin compatible with industry  
standard EPROM products. In addition to EPROM func-  
tionality, these devices also support electrical Erase  
operation via an external programmer. They do not  
require a UV source to erase, and therefore the pack-  
ages do not have a window.  
Featuring high performance Byte-Program, the  
SST27VF010/020 provide a Byte-Program time of 15 µs.  
Designed, manufactured, and tested for a wide spectrum of  
applications, these devices are offered with an endurance  
of at least 1000 cycles. Data retention is rated at greater  
than 100 years.  
Read  
The Read operation of the SST27VF010/020 is controlled  
by CE# and OE#. Both CE# and OE# have to be low for  
the system to obtain data from the outputs. Once the  
address is stable, the address access time is equal to the  
delay from CE# to output (TCE). Data is available at the out-  
put after a delay of TOE from the falling edge of OE#,  
assuming that CE# pin has been low and the addresses  
have been stable for at least TCE-TOE. When the CE# pin is  
high, the chip is deselected and a typical standby current of  
2 µA is consumed. OE# is the output control and is used to  
gate data from the output pins. The data bus is in high  
impedance state when either CE# or OE# is high.  
The SST27VF010/020 are suited for applications that  
require infrequent writes and low power nonvolatile stor-  
age. These devices will improve flexibility, efficiency, and  
performance while matching the low cost in nonvolatile  
applications that currently use UV-EPROMs, OTPs, and  
mask ROMs.  
To meet surface mount and conventional through hole  
requirements, the SST27VF010/020 are offered in 32-pin  
PDIP, 32-lead PLCC, and 32-lead TSOP packages. See  
Figures 1, 2, and 3 for pin assignments.  
©2003 Silicon Storage Technology, Inc.  
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.  
MTP is a trademark of Silicon Storage Technology, Inc.  
S71251-00-000  
1
12/03  
These specifications are subject to change without notice.  
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