PDM Digital Input, Mono
2.7 W Class-D Audio Amplifier
SSM2537
architecture enables extremely low real-world power consumption
from digital audio sources with excellent audio performance. Using
the SSM2537, audio can be transmitted digitally to the audio
amplifier, significantly reducing the effect of noise sources such
as GSM interference or other digital signals on the transmitted
audio. The SSM2537 is capable of delivering 2.7 W of continu-
ous output power with <1% THD + N driving a 4 Ω load from a
5.0 V supply.
Data Sheet
FEATURES
Filterless digital Class-D amplifier
Pulse density modulation (PDM) digital input interface
2.7 W into 4 Ω load and 1.4 W into 8 Ω load at 5.0 V supply
with <1% total harmonic distortion plus noise (THD + N)
Available in 9-ball, 1.2 mm × 1.2 mm, 0.4 mm pitch WLCSP
93% efficiency into 8 Ω at full scale
Output noise: 25 µV rms at 3.6 V, A-weighted
THD + N: 0.005% at 1 kHz, 100 mW output power
PSRR: 80 dB at 217 Hz, with dither input
The SSM2537 features a high efficiency, low noise modulation
scheme that requires no external LC output filters. The closed-loop,
three-level modulator design retains the benefits of an all-digital
amplifier, yet enables very good PSRR and audio performance. The
modulation continues to provide high efficiency even at low output
power and has an SNR of 102 dB PDM input. Spread-spectrum
pulse density modulation is used to provide lower EMI-radiated
emissions compared with other Class-D architectures.
Quiescent power consumption: 5.1 mW
(VDD = 1.8 V, PVDD = 3.6 V, 8 Ω + 33 µH load)
Pop-and-click suppression
Configurable with PDM pattern inputs
Short-circuit and thermal protection with autorecovery
Smart power-down when PDM stop condition or no clock
input detected
64 × fS or 128 × fS operation supporting 3 MHz and 6 MHz clocks
DC blocking high-pass filter and static input dc protection
User-selectable ultralow EMI emissions and low latency modes
Power-on reset (POR)
The SSM2537 has a four-state gain and sample frequency selection
pin that can select two different gain settings, optimized for 3.6 V
and 5 V operation. This same pin controls the internal digital fil-
tering and clocking, which can be set for a 64 × fS or 128 × fS input
sample rate to support both 3 MHz and 6 MHz PDM clock rates.
Minimal external passive components
The SSM2537 has a micropower shutdown mode with a typical
shutdown current of 1.6 µA for both power supplies. Shutdown is
enabled automatically by gating input clock and data signals. A
standby mode can be entered by applying a designated PDM stop
condition sequence. The device also includes pop-and-click sup-
pression circuitry. This suppression circuitry minimizes voltage
glitches at the output when entering or leaving the low power
state, reducing audible noises on activation and deactivation.
APPLICATIONS
Mobile handsets
GENERAL DESCRIPTION
The SSM2537 is a PDM digital input Class-D power amplifier
that offers higher performance than existing DAC plus Class-D
solutions. The SSM2537 is ideal for power sensitive applications
where system noise can corrupt the small analog signal sent to
the amplifier, such as mobile phones and portable media players.
The SSM2537 is specified over the industrial temperature range
of −40°C to +85°C. It has built-in thermal shutdown and output
short-circuit protection. It is available in a 9-ball, 1.2 mm ×
1.2 mm wafer level chip scale package (WLCSP).
The SSM2537 combines an audio digital-to-analog converter
(DAC), a power amplifier, and a PDM digital interface on a single
chip. The integrated DAC plus analog sigma-delta (Σ-Δ) modulator
FUNCTIONAL BLOCK DIAGRAM
VDD
PVDD
PGND
SSM2537
POWER-ON
RESET
CLOCKING POWER
CONTROL
PDAT
PCLK
OUT+
OUT–
Σ-Δ
INPUT
INTERFACE
FILTERING/
DAC
FULL-BRIDGE
POWER STAGE
CLASS-D
MODULATOR
GAIN_FS
LRSEL
Figure 1.
Rev. 0
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Technical Support
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www.analog.com
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