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SSM2602CPZ-R21 PDF预览

SSM2602CPZ-R21

更新时间: 2024-11-03 04:02:47
品牌 Logo 应用领域
亚德诺 - ADI 解码器编解码器
页数 文件大小 规格书
28页 448K
描述
Low Power Audio Codec

SSM2602CPZ-R21 数据手册

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Low Power Audio Codec  
SSM2602  
Preliminary Technical Data  
FEATURES  
GENERAL DESCRIPTION  
Stereo, 24-bit analog-to-digital and digital-to-analog converters  
DAC SNR: 98 dB (A-weighted), THD: −80 dB at 48 kHz, 3.3 V  
ADC SNR: 90 dB (A-weighted), THD: −80 dB at 48 kHz, 3.3 V  
Highly efficient headphone amplifier  
Complete stereo/mono or microphone/line interface  
Low power  
7 mW stereo playback (1.8 V/1.8 V supplies)  
14 mW record and playback (1.8 V/1.8 V supplies)  
Low supply voltages  
The SSM2602 is a low power, high quality stereo audio codec  
for portable digital audio applications with stereo programmable  
gain amplifier (PGA) line and monaural microphone inputs. It  
features two 24-bit analog-to-digital converter (ADC) channels  
and two 24-bit digital-to-audio (DAC) converter channels.  
The SSM2602 can operate as a master or a slave. It offers  
various master clock frequencies, including 12 MHz or 24 MHz  
for USB devices; standard 256 fS rates, such as 12.288 MHz and  
24.576 MHz; and many common audio-sampling rates, such as  
96 kHz, 88.2 kHz, 48 kHz, 44.1 kHz, 32 kHz, 16 kHz, and 8 kHz.  
Analog: 1.8 V to 3.6 V  
Digital core: 1.8 V to 3.6 V  
The SSM2602 can operate at power supplies as low as 1.8 V for  
the analog circuitry and 1.5 V for the digital circuitry. The  
maximum voltage supply is 3.6 V for all supplies.  
Digital I/O: 1.8 V/3.6 V  
256 fS/384 fS or USB master clock rate: 12 MHz, 24 MHz  
Audio sample rates: 8 kHz,16 kHz, 32 kHz, 44.1 kHz, 48 kHz,  
88.2 kHz, and 96 kHz  
The SSM2602 software-programmable output options provide  
the user with many application options, such as speaker driver,  
headphone driver, or both. Its volume control functions provide  
a large range of gain control of the audio signal.  
28-lead, 5 mm × 5 mm LFCSP (QFN) package  
APPLICATIONS  
Mobile phones  
MP3 players  
Portable gaming  
Portable electronics  
Educational toys  
The SSM2602 is specified over the industrial temperature range  
of −40°C to +85°C. It is available in a 28-lead, 5 mm × 5 mm  
lead frame chip scale package (LFCSP).  
FUNCTIONAL BLOCK DIAGRAM  
AVDD VMID AGND  
DBVDD DGND DCVDD  
HPVDD PGND  
SSM2602  
MICBIAS  
BYPASS/MUTE 3dB STEP  
6dB~15dB/MUTE 3dB STEP  
ATTEN  
ATTEN  
–73dB~+6dB,  
1dB STEP  
–34.5dB~+33dB,  
1.5dB STEP  
RHPOUT  
ROUT  
RLINEIN  
MICIN  
MUX  
MUX  
ADC  
ADC  
DAC  
DIGITAL  
PROCESSOR  
LOUT  
14dB/34dB  
DAC  
LLINEIN  
LHPOUT  
–34.5dB~+33dB,  
1.5dB STEP  
–73dB~+6dB,  
1dB STEP  
6dB~15dB/MUTE 3dB STEP  
BYPASS/MUTE 3dB STEP  
ATTEN  
ATTEN  
CLK  
DIGITAL AUDIO INTERFACE  
CONTROL INTERFACE  
MCLK/ XTO CLKOUT  
XTI  
DACDAT ADCDAT BCLK DACLRC ADCLRC MODE CSB SDIN SCLK  
Figure 1.  
Rev. PrB  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2007 Analog Devices, Inc. All rights reserved.  
 

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