Datasheet > SPT9691SCN

SPT9691SCN

更新时间： 2024-09-13 06:13:31

品牌	Logo	应用领域
CADEKA		比较器放大器输入元件
页数	文件大小	规格书
10页	174K
描述
WIDE INPUT VOLTAGE, JFET COMPARATOR

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SPT9691SCN 数据手册

SPT9691

WIDE INPUT VOLTAGE, JFET COMPARATOR

FEATURES

APPLICATIONS

•

Common Mode Range -4.0 to +8.0 V

•

Automated Test Equipment

High-Speed Instrumentation

Window Comparators

High-Speed Timing

Line Receivers

High-Speed Triggers

Threshold Detection

Peak Detection

Low Input Bias Current <100 pA

Propagation Delay 2.5 ns (max)

Low Offset ±25 mV

Low Feedthrough and Crosstalk

Differential Latch Control

GENERAL DESCRIPTION

The SPT9691 is a high-speed, wide common mode voltage,

JFET input, dual comparator. It is designed for applications

that measure critical timing parameters in which wide com-

mon mode input voltages of -4.0 to +8.0 V are required.

Propagation delays are constant for overdrives greater than

200 mV.

most applications. The device has differential analog inputs

and complementary logic outputs compatible with ECL sys-

tems. Each comparator has a complementary latch enable

control that can be driven by standard ECL logic.

The SPT9691 is available in 20-lead PLCC, 20-lead plastic

DIP and 20-contact LCC packages over the commercial

temperature range. It is also available in die form.

JFET inputs reduce the input bias currents to the nanoamp

level, eliminating the need for input drivers and buffers in

BLOCK DIAGRAM

Q_A

Q_B

Q_A

Q_B

GND

GND_B

LE_B

DVEE(A)

DV_EE(B)

AV^EE(A)

AVCC(A)

AV_EE(B)

AVCC (B)

-IN_B

-INA

+INA

+IN_B

12 3 4 5 6 7...10

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