Datasheet > SPT9693SCU

SPT9693SCU

更新时间： 2024-09-15 06:13:31

品牌	Logo	应用领域
CADEKA		比较器放大器输入元件
页数	文件大小	规格书
10页	171K
描述
WIDE INPUT VOLTAGE, JFET COMPARATOR

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技术参数
数据手册

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SPT9693SCU 技术参数

生命周期：	Obsolete	Reach Compliance Code：	unknown
风险等级：	5.77	Is Samacsys：	N
放大器类型：	COMPARATOR	子类别：	Comparator
Base Number Matches：	1

SPT9693SCU 数据手册

SPT9693

WIDE INPUT VOLTAGE, JFET COMPARATOR

TECHNICAL DATA

MARCH 1, 2001

FEATURES

APPLICATIONS

• Common mode range –3.0 to +8.0 V

• Low input bias current <100 pA

• Propagation delay 1.5 ns (max)

• Low offset ±25 mV

• Automated test equipment

• High-speed instrumentation

• Window comparators

• High-speed timing

• Low feedthrough and crosstalk

• Differential latch control

• Line receivers

• High-speed triggers

• Threshold detection

• Peak detection

GENERAL DESCRIPTION

The SPT9693 is a high-speed, wide common mode volt-

age, JFET input, dual comparator. It is designed for appli-

cations that measure critical timing parameters in which

wide common mode input voltages of –3.0 to +8.0 V are

required. Propagation delays are constant for overdrives

greater than 50 mV.

buffers in most applications. The device has differential

analog inputs and complementary logic outputs com-

patible with ECL systems. Each comparator has a

complementary latch enable control that can be driven by

standard ECL logic.

The SPT9693 is available in 20-contact LCC and 20-lead

PLCC packages over the commercial temperature range.

It is also available in die form.

JFET inputs reduce the input bias currents to the

nanoamp level, eliminating the need for input drivers and

BLOCK DIAGRAM

GND

N/C

AV (B)

N/C

AV (B)

AV (A)

AV (A) IN

+IN

12 3 4 5 6 7...10

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