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SPT9689BIP PDF预览

SPT9689BIP

更新时间: 2024-09-16 22:25:43
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 比较器
页数 文件大小 规格书
8页 78K
描述
DUAL ULTRAFAST VOLTAGE COMPARATOR

SPT9689BIP 数据手册

 浏览型号SPT9689BIP的Datasheet PDF文件第2页浏览型号SPT9689BIP的Datasheet PDF文件第3页浏览型号SPT9689BIP的Datasheet PDF文件第4页浏览型号SPT9689BIP的Datasheet PDF文件第5页浏览型号SPT9689BIP的Datasheet PDF文件第6页浏览型号SPT9689BIP的Datasheet PDF文件第7页 
SPT9689  
DUAL ULTRAFAST VOLTAGE COMPARATOR  
TECHNICAL DATA  
FEBRUARY 20, 2001  
FEATURES  
APPLICATIONS  
• 650 ps propagation delay  
• 100 ps propagation delay variation  
• 70 dB CMRR  
• Low feedthrough and crosstalk  
• Differential latch control  
• ECL compatible  
• Automated test equipment  
• High-speed instrumentation  
• Window comparators  
• High-speed timing  
• Line receivers  
• High-speed triggers  
• Threshold detection  
• Peak detection  
GENERAL DESCRIPTION  
The SPT9689 is a Subnanosecond monolithic dual com- ECL-compatible complementary digital outputs are ca-  
parator. The propagation delay variation is less than pable of driving 50 terminated transmission lines and  
100 ps from 5 to 50 mV input overdrive voltage. The input providing 30 mA output drive.The SPT9689 is pin compat-  
slew rate is 10 V/ns. The device utilizes a high precision ible with the SPT9687. It is available in 20-lead PLCC and  
differential input stage with a common-mode range of 20-contact LCC packages over the industrial temperature  
2.5 V to +4.0 V.  
range. The SPT9689 is also available in die form.  
BLOCK DIAGRAM  
INVERTING  
NONINVERTING  
INPUT  
INPUT  
–
+
LATCH ENABLE  
LATCH ENABLE  
A
Q OUTPUT  
Q OUTPUT  
VEE  
VCC  
GNDB  
GNDA  
Q OUTPUT  
Q OUTPUT  
B
LATCH ENABLE  
LATCH ENABLE  
+
–
INVERTING  
INPUT  
NONINVERTING  
INPUT  

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