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SNJ54LVC86AW PDF预览

SNJ54LVC86AW

更新时间： 2024-11-26 05:16:51
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德州仪器 - TI 输入元件
页数 文件大小 规格书
17页 520K
描述
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

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SNJ54LVC86AW 技术参数

生命周期：Active零件包装代码：DFP
包装说明：DFP, FL14,.3针数：14
Reach Compliance Code：not_compliantHTS代码：8542.39.00.01
风险等级：5.46系列：LVC/LCX/Z
JESD-30 代码：R-GDFP-F14长度：9.21 mm
负载电容（CL）：50 pF逻辑集成电路类型：XOR GATE
最大I（ol）：0.024 A功能数量：4
输入次数：2端子数量：14
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DFP
封装等效代码：FL14,.3封装形状：RECTANGULAR
封装形式：FLATPACK包装方法：TUBE
峰值回流温度（摄氏度）：NOT SPECIFIED电源：3.3 V
最大电源电流（ICC）：0.01 mAProp。Delay @ Nom-Sup：4.6 ns
传播延迟（tpd）：5.6 ns认证状态：Not Qualified
施密特触发器：NO筛选级别：MIL-PRF-38535
座面最大高度：2.03 mm子类别：Gates
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：2 V
标称供电电压 (Vsup)：2.7 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子形式：FLAT端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：5.97 mmBase Number Matches：1

SNJ54LVC86AW 数据手册

 浏览型号SNJ54LVC86AW的Datasheet PDF文件第2页浏览型号SNJ54LVC86AW的Datasheet PDF文件第3页浏览型号SNJ54LVC86AW的Datasheet PDF文件第4页浏览型号SNJ54LVC86AW的Datasheet PDF文件第5页浏览型号SNJ54LVC86AW的Datasheet PDF文件第6页浏览型号SNJ54LVC86AW的Datasheet PDF文件第7页 
SN54LVC86A, SN74LVC86A  
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES  
www.ti.com  
SCAS288P–JANUARY 1993–REVISED APRIL 2005  
FEATURES  
•
•
•
Typical VOHV (Output VOH Undershoot)  
>2 V at VCC = 3.3 V, TA = 25°C  
•
Operate From 1.65 V to 3.6 V  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
•
Specified From –40°C to 85°C,  
–40°C to 125°C, and –55°C to 125°C  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
•
•
•
Inputs Accept Voltages to 5.5 V  
Max tpd of 4.6 ns at 3.3 V  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
– 1000-V Charged-Device Model (C101)  
SN54LVC86A . . . J OR W PACKAGE  
SN74LVC86A . . . D, DB, NS, OR PW PACKAGE  
(TOP VIEW)  
SN74LVC86A . . . RGY PACKAGE  
(TOP VIEW)  
SN54LVC86A . . . FK PACKAGE  
(TOP VIEW)  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1A  
1B  
V
CC  
1
14  
3
2
1 20 19  
18  
4B  
4A  
4Y  
3B  
3A  
3Y  
4A  
NC  
4Y  
1Y  
NC  
2A  
4
5
6
7
8
1B  
1Y  
2A  
2B  
2Y  
13 4B  
2
3
4
5
6
1Y  
2A  
2B  
2Y  
17  
16  
12  
11  
10  
9
4A  
4Y  
3B  
3A  
15 NC  
14  
NC  
2B  
3B  
9 10 11 12 13  
8
GND  
7
8
NC - No internal connection  
DESCRIPTION/ORDERING INFORMATION  
The SN54LVC86A quadruple 2-input exclusive-OR gate is designed for 2.7-V to 3.6-V VCC operation, and the  
SN74LVC86A quadruple 2-input exclusive-OR gate is designed for 1.65-V to 3.6-V VCC operation.  
The 'LVC86A devices perform the Boolean function Y = A B or Y = AB + AB in positive logic.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
TA  
PACKAGE(1)  
–40°C to 85°C  
QFN – RGY  
SOIC – D  
Reel of 1000  
SN74LVC86ARGYR  
SN74LVC86AD  
LC86A  
Tube of 50  
Reel of 2500  
Reel of 250  
Reel of 2000  
Reel of 2000  
Tube of 90  
Reel of 2000  
Reel of 250  
Tube of 25  
Tube of 150  
Tube of 55  
SN74LVC86ADR  
SN74LVC86ADT  
SN74LVC86ANSR  
SN74LVC86ADBR  
SN74LVC86APW  
SN74LVC86APWR  
SN74LVC86APWT  
SNJ54LVC86AJ  
LVC86A  
SOP – NS  
LVC86A  
LC86A  
–40°C to 125°C  
SSOP – DB  
TSSOP – PW  
LC86A  
CDIP – J  
CFP – W  
LCCC – FK  
SNJ54LVC86AJ  
SNJ54LVC86AW  
SNJ54LVC86AFK  
–55°C to 125°C  
SNJ54LVC86AW  
SNJ54LVC86AFK  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1993–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
On products compliant to MIL-PRF-38535, all parameters are  
Instruments standard warranty. Production processing does not  
tested unless otherwise noted. On all other products, production  
necessarily include testing of all parameters.  
processing does not necessarily include testing of all parameters.  
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