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SNJ54ACT86W PDF预览

SNJ54ACT86W

更新时间: 2024-11-24 05:04:39
品牌 Logo 应用领域
德州仪器 - TI 输入元件
页数 文件大小 规格书
15页 514K
描述
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SNJ54ACT86W 技术参数

是否无铅: 不含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:DFP
包装说明:QFF, FL14,.3针数:14
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:26 weeks
风险等级:1.21系列:ACT
JESD-30 代码:R-GDFP-F14JESD-609代码:e0
长度:9.21 mm负载电容(CL):50 pF
逻辑集成电路类型:XOR GATE最大I(ol):0.024 A
功能数量:4输入次数:2
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, GLASS-SEALED
封装代码:QFF封装等效代码:FL14,.3
封装形状:RECTANGULAR封装形式:FLATPACK
包装方法:TUBE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):0.08 mA
Prop。Delay @ Nom-Sup:10.5 ns传播延迟(tpd):10.5 ns
认证状态:Not Qualified施密特触发器:NO
筛选级别:MIL-PRF-38535座面最大高度:2.03 mm
子类别:Gate最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:FLAT端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6.29 mm

SNJ54ACT86W 数据手册

 浏览型号SNJ54ACT86W的Datasheet PDF文件第2页浏览型号SNJ54ACT86W的Datasheet PDF文件第3页浏览型号SNJ54ACT86W的Datasheet PDF文件第4页浏览型号SNJ54ACT86W的Datasheet PDF文件第5页浏览型号SNJ54ACT86W的Datasheet PDF文件第6页浏览型号SNJ54ACT86W的Datasheet PDF文件第7页 
ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢇ ꢈ ꢉ ꢀꢁꢊ ꢃꢄ ꢅꢆ ꢇꢈ  
ꢋ ꢌꢄꢍꢎ ꢌꢏꢐ ꢑ ꢒ ꢓꢔꢁ ꢏꢌꢆ ꢑꢕ ꢅꢐ ꢌꢀꢔ ꢖꢑꢓꢗ ꢎ ꢘ ꢄꢆꢑ ꢀ  
SCAS534C − AUGUST 1995 − REVISED OCTOBER 2003  
D
D
4.5-V to 5.5-V V  
Operation  
D
D
Max t of 10 ns at 5 V  
pd  
Inputs Are TTL-Voltage Compatible  
CC  
Inputs Accept Voltages to 5.5 V  
SN54ACT86 . . . J OR W PACKAGE  
SN74ACT86 . . . D, DB, N, NS, OR PW PACKAGE  
(TOP VIEW)  
SN54ACT86 . . . FK PACKAGE  
(TOP VIEW)  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1A  
1B  
1Y  
2A  
2B  
V
CC  
3
2
1
20 19  
18  
4B  
4A  
4Y  
3B  
3A  
3Y  
4A  
NC  
4Y  
NC  
3B  
1Y  
NC  
2A  
4
5
6
7
8
17  
16  
15  
14  
NC  
2B  
2Y  
GND  
8
9 10 11 12 13  
NC − No internal connection  
description/ordering information  
The ’ACT86 devices are quadruple 2-input exclusive-OR gates. The devices perform the Boolean functions  
Y = A B or Y = AB + AB in positive logic.  
A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced  
in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the  
output.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
SOIC − D  
Tube  
SN74ACT86N  
SN74ACT86N  
Tube  
SN74ACT86D  
ACT86  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SN74ACT86DR  
SN74ACT86NSR  
SN74ACT86DBR  
SN74ACT86PW  
SN74ACT86PWR  
SNJ54ACT86J  
SNJ54ACT86W  
SNJ54ACT86FK  
SOP − NS  
ACT86  
AD86  
−40°C to 85°C  
SSOP − DB  
TSSOP − PW  
AD86  
Tape and reel  
Tube  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54ACT86J  
SNJ54ACT86W  
SNJ54ACT86FK  
Tube  
−55°C to 125°C  
Tube  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢗ ꢚ ꢥ ꢝ ꢜꢨ ꢣꢢ ꢠꢡ ꢢꢜ ꢞꢥ ꢧꢙ ꢟꢚ ꢠ ꢠꢜ ꢯꢔ ꢐꢓ ꢏꢎ ꢰ ꢓꢱꢇꢂ ꢱꢂꢉ ꢟꢧꢧ ꢥꢟ ꢝ ꢟ ꢞꢤ ꢠꢤꢝ ꢡ ꢟ ꢝ ꢤ ꢠꢤ ꢡꢠꢤ ꢨ  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ  
ꢣ ꢚꢧ ꢤꢡꢡ ꢜ ꢠꢪꢤ ꢝ ꢬꢙ ꢡꢤ ꢚ ꢜꢠꢤ ꢨꢩ ꢗ ꢚ ꢟꢧ ꢧ ꢜ ꢠꢪꢤ ꢝ ꢥꢝ ꢜ ꢨꢣꢢ ꢠꢡ ꢉ ꢥꢝ ꢜ ꢨꢣꢢ ꢠꢙꢜ ꢚ  
ꢨꢤ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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