5秒后页面跳转
SN75ALS053 PDF预览

SN75ALS053

更新时间: 2024-09-20 11:58:15
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
11页 274K
描述
QUADRUPLE FUTUREBUS TRANSCEIVER

SN75ALS053 数据手册

 浏览型号SN75ALS053的Datasheet PDF文件第2页浏览型号SN75ALS053的Datasheet PDF文件第3页浏览型号SN75ALS053的Datasheet PDF文件第4页浏览型号SN75ALS053的Datasheet PDF文件第5页浏览型号SN75ALS053的Datasheet PDF文件第6页浏览型号SN75ALS053的Datasheet PDF文件第7页 
SN75ALS053  
QUADRUPLE FUTUREBUS TRANSCEIVER  
SLLS034B – JANUARY 1988 – REVISED MAY 1995  
N PACKAGE  
(TOP VIEW)  
High-Speed Quadruple Transceiver  
Meets or Exceeds Requirements of IEEE  
Std. 896.1 – 1987  
V
BG GND  
BUS GND  
B1  
B2  
BUS GND  
B3  
B4  
BUS GND  
RE  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
CC  
D1  
R1  
D2  
R2  
Drives Load Impedances as Low as 10  
High-Speed Advanced Low-Power Schottky  
Circuits  
Low Power Dissipation . . . 81 mW Max per  
Channel  
LOGIC GND  
D3  
R3  
D4  
R4  
High-Impedance PNP Inputs  
BTL Logic Level 1-V Bus Swing Reduces  
Power Consumption  
TE  
Low Bus-Port Capacitance  
FN PACKAGE  
(TOP VIEW)  
Power-Up/Power-Down Protection  
(Glitch Free)  
Open-Collector Driver Outputs Allows  
Wired-OR Connections  
Multiple Bus Channel Ground Returns to  
Reduce Channel Noise Interference  
3
2
1
20 19  
18  
Designed to be a Faster, Lower Power  
Functional Equivalent of the National  
Semiconductor DS3893  
B1  
D2  
4
5
6
7
8
B2  
R2  
LOGIC GND  
D3  
17  
BUS GND  
16  
15  
14  
B3  
B4  
description  
R3  
9 10 11 12 13  
The SN75ALS053 is a four-channel, monolithic,  
high-speed, advanced low-power Schottky de-  
vice designed for two-way data communication  
in  
a
densely populated backplane. The  
SN75ALS053 has independent driver input (Dn)  
and receiver output (Rn) pins and separate driver  
and receiver disables. This transceiver is designed for use in high-speed bus systems and is similar to the  
SN75ALS057 transceiver except that the trapezoidal feature has been eliminated to speed up the propagation  
delays.  
These transceivers feature open-collector driver outputs, each with a series Schottky diode to reduce capacitive  
loading to the bus. By using a 2-V pullup on the bus, the output signal swing will be approximately 1 V, which  
reduces the power necessary to drive the bus load capacitance. The driver outputs are capable of driving an  
equivalent dc load of as low as 10 .  
The receivers have a precision threshold set by an internal bandgap reference to give accurate input thresholds  
over V  
and temperature variations.  
CC  
These transceivers are compatible with Backplane Transceiver Logic (BTL ) technology at significantly  
reduced power dissipation per channel.  
The SN75ALS053 is characterized for operation from 0° to 70°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
BTL and DS3893 are trademarks of National Semiconductor Corporation.  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

与SN75ALS053相关器件

型号 品牌 获取价格 描述 数据表
SN75ALS053FN ROCHESTER

获取价格

LINE TRANSCEIVER, PQCC20
SN75ALS053FN TI

获取价格

QUADRUPLE FUTUREBUS TRANSCEIVER
SN75ALS053FNR TI

获取价格

Quadruple Futurebus Transceiver 20-PLCC 0 to 70
SN75ALS053N TI

获取价格

Quadruple Futurebus Transceiver 20-PDIP 0 to 70
SN75ALS053N ROCHESTER

获取价格

LINE TRANSCEIVER, PDIP20
SN75ALS053N-10 TI

获取价格

QUAD LINE TRANSCEIVER, PDIP20
SN75ALS056 TI

获取价格

TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
SN75ALS056DW TI

获取价格

TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
SN75ALS056DW-00 TI

获取价格

LINE TRANSCEIVER, PDSO20
SN75ALS056DW-00R TI

获取价格

LINE TRANSCEIVER, PDSO20