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SN75ALS053N PDF预览

SN75ALS053N

更新时间: 2024-11-08 19:53:47
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管接口集成电路驱动器
页数 文件大小 规格书
8页 134K
描述
Quadruple Futurebus Transceiver 20-PDIP 0 to 70

SN75ALS053N 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete包装说明:DIP,
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.65
差分输出:NO驱动器位数:4
输入特性:STANDARD接口集成电路类型:LINE TRANSCEIVER
接口标准:IEEE 896.1JESD-30 代码:R-PDIP-T20
长度:24.325 mm功能数量:1
端子数量:20最高工作温度:70 °C
最低工作温度:输出特性:OPEN-COLLECTOR
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified最大接收延迟:8 ns
接收器位数:4座面最大高度:5.08 mm
最大压摆率:65 mA最大供电电压:5.25 V
最小供电电压:4.75 V标称供电电压:5 V
表面贴装:NO技术:BIPOLAR
温度等级:COMMERCIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED最大传输延迟:7 ns
宽度:7.62 mmBase Number Matches:1

SN75ALS053N 数据手册

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SN75ALS053  
QUADRUPLE FUTUREBUS TRANSCEIVER  
SLLS034B – JANUARY 1988 – REVISED MAY 1995  
N PACKAGE  
(TOP VIEW)  
High-Speed Quadruple Transceiver  
Meets or Exceeds Requirements of IEEE  
Std. 896.1 – 1987  
V
BG GND  
BUS GND  
B1  
B2  
BUS GND  
B3  
B4  
BUS GND  
RE  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
CC  
D1  
R1  
D2  
R2  
Drives Load Impedances as Low as 10  
High-Speed Advanced Low-Power Schottky  
Circuits  
Low Power Dissipation . . . 81 mW Max per  
Channel  
LOGIC GND  
D3  
R3  
D4  
R4  
High-Impedance PNP Inputs  
BTL Logic Level 1-V Bus Swing Reduces  
Power Consumption  
TE  
Low Bus-Port Capacitance  
FN PACKAGE  
(TOP VIEW)  
Power-Up/Power-Down Protection  
(Glitch Free)  
Open-Collector Driver Outputs Allows  
Wired-OR Connections  
Multiple Bus Channel Ground Returns to  
Reduce Channel Noise Interference  
3
2
1
20 19  
18  
Designed to be a Faster, Lower Power  
Functional Equivalent of the National  
Semiconductor DS3893  
B1  
D2  
4
5
6
7
8
B2  
R2  
LOGIC GND  
D3  
17  
BUS GND  
16  
15  
14  
B3  
B4  
description  
R3  
9 10 11 12 13  
The SN75ALS053 is a four-channel, monolithic,  
high-speed, advanced low-power Schottky de-  
vice designed for two-way data communication  
in  
a
densely populated backplane. The  
SN75ALS053 has independent driver input (Dn)  
and receiver output (Rn) pins and separate driver  
and receiver disables. This transceiver is designed for use in high-speed bus systems and is similar to the  
SN75ALS057 transceiver except that the trapezoidal feature has been eliminated to speed up the propagation  
delays.  
These transceivers feature open-collector driver outputs, each with a series Schottky diode to reduce capacitive  
loading to the bus. By using a 2-V pullup on the bus, the output signal swing will be approximately 1 V, which  
reduces the power necessary to drive the bus load capacitance. The driver outputs are capable of driving an  
equivalent dc load of as low as 10 .  
The receivers have a precision threshold set by an internal bandgap reference to give accurate input thresholds  
over V  
and temperature variations.  
CC  
These transceivers are compatible with Backplane Transceiver Logic (BTL ) technology at significantly  
reduced power dissipation per channel.  
The SN75ALS053 is characterized for operation from 0° to 70°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
BTL and DS3893 are trademarks of National Semiconductor Corporation.  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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IC,BUS TRANSCEIVER,SINGLE,8-BIT,ALS-TTL,LLCC,20PIN,CERAMIC