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SN74LVC3G04DCURE4 PDF预览

SN74LVC3G04DCURE4

更新时间: 2024-11-16 15:52:19
品牌 Logo 应用领域
德州仪器 - TI 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
16页 851K
描述
Triple Inverter Gate 8-US8 -40 to 85

SN74LVC3G04DCURE4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:VSSOP, TSSOP8,.12,20针数:8
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.18系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G8JESD-609代码:e4
长度:2.3 mm负载电容(CL):50 pF
逻辑集成电路类型:INVERTER最大I(ol):0.024 A
湿度敏感等级:1功能数量:3
输入次数:1端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:VSSOP封装等效代码:TSSOP8,.12,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:4.1 ns
传播延迟(tpd):7.9 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:0.9 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:2 mmBase Number Matches:1

SN74LVC3G04DCURE4 数据手册

 浏览型号SN74LVC3G04DCURE4的Datasheet PDF文件第2页浏览型号SN74LVC3G04DCURE4的Datasheet PDF文件第3页浏览型号SN74LVC3G04DCURE4的Datasheet PDF文件第4页浏览型号SN74LVC3G04DCURE4的Datasheet PDF文件第5页浏览型号SN74LVC3G04DCURE4的Datasheet PDF文件第6页浏览型号SN74LVC3G04DCURE4的Datasheet PDF文件第7页 
SN74LVC3G04  
www.ti.com  
SCES363L AUGUST 2001REVISED NOVEMBER 2013  
Triple Inverter Gate  
Check for Samples: SN74LVC3G04  
1
FEATURES  
DESCRIPTION  
This triple inverter is designed for 1.65-V to 5.5-V VCC  
operation. The SN74LVC3G04 device performs the  
Boolean function Y = A.  
2
Available in the Texas Instruments NanoFree™  
Package  
Supports 5-V VCC Operation  
NanoFree™ package technology is  
a
major  
Inputs Accept Voltages to 5.5 V  
Max tpd of 4.1 ns at 3.3 V  
breakthrough in IC packaging concepts, using the die  
as the package.  
Low Power Consumption, 10-µA Max ICC  
±24-mA Output Drive at 3.3 V  
This device is fully specified for partial-power-down  
applications using Ioff. The Ioff circuitry disables the  
outputs, preventing damaging current backflow  
through the device when it is powered down.  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
Typical VOHV (Output VOH Undershoot)  
>2 V at VCC = 3.3 V, TA = 25°C  
Ioff Supports Live Insertion, Partial-Power-  
Down Mode, and Back-Drive Protection  
Can Be Used as a Down Translator to  
Translate Inputs From a Max of 5.5 V Down to  
the VCC Level  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
1000-V Charged-Device Model (C101)  
DCT PACKAGE  
(TOP VIEW)  
DCU PACKAGE  
(TOP VIEW)  
YZP PACKAGE  
(BOTTOM VIEW)  
4 5  
2Y  
3A  
1Y  
GND  
2A  
1A  
3Y  
VCC  
1Y  
1
2
3
4
8
7
6
5
3 6  
1
2
8
7
1A  
3Y  
VCC  
1Y  
2
7
3Y  
1A  
1 8  
V
CC  
2A  
3A  
GND  
2Y  
3
4
6
5
2A  
3A  
2Y  
GND  
See mechanical drawings for dimensions.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
NanoFree is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2001–2013, Texas Instruments Incorporated  
 

SN74LVC3G04DCURE4 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC3G04DCURG4 TI

完全替代

3 通道、1.65V 至 5.5V 反相器 | DCU | 8 | -40 to 125
SN74LVC3G06DCUR TI

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TRIPLE INVERTER BUFFER/DRIVER WITH OPEN DRAIN OUTPUTS
SN74LVC3G04DCUR TI

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TRIPLE INVERTER GATE

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