Datasheet > SN74LVC1G04-EP

SN74LVC1G04-EP

更新时间： 2024-11-03 02:58:39

品牌	Logo	应用领域
德州仪器 - TI		栅
页数	文件大小	规格书
17页	454K
描述
Single Inverter Gate

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数据手册

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SN74LVC1G04-EP 数据手册

SN74LVC1G04

SINGLE INVERTER GATE

www.ti.com

SCES214S–APRIL 1999–REVISED OCTOBER 2005

FEATURES

•

Available in the Texas Instruments

NanoStar™ and NanoFree™ Packages

•

I_offSupports Partial-Power-Down Mode

Operation

•

Supports 5-V V_CCOperation

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

Inputs Accept Voltages to 5.5 V

Max t_pdof 3.3 ns at 3.3 V

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

Low Power Consumption, 10-µA Max I_CC

±24-mA Output Drive at 3.3 V

– 1000-V Charged-Device Model (C101)

DBV PACKAGE

(TOP VIEW)

DCK PACKAGE

(TOP VIEW)

DRL PACKAGE

(TOP VIEW)

GND

YEA, YEP, YZA, OR YZP PACKAGE

(BOTTOM VIEW)

YZV PACKAGE

(BOTTOM VIEW)

GND

DNU

DNU − Do not use

See mechanical drawings for dimensions.

DESCRIPTION/ORDERING INFORMATION

This single inverter gate is designed for 1.65-V to 5.5-V V_CCoperation.

The SN74LVC1G04 performs the Boolean function Y = A.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the

die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_offcircuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar, NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

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