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SN74LVC16T245

更新时间： 2024-11-03 23:09:43
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
17页 325K
描述
16 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS

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SN74LVC16T245 数据手册

 浏览型号SN74LVC16T245的Datasheet PDF文件第2页浏览型号SN74LVC16T245的Datasheet PDF文件第3页浏览型号SN74LVC16T245的Datasheet PDF文件第4页浏览型号SN74LVC16T245的Datasheet PDF文件第5页浏览型号SN74LVC16T245的Datasheet PDF文件第6页浏览型号SN74LVC16T245的Datasheet PDF文件第7页 
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SCES585 − JULY 2004  
DGG OR DGV PACKAGE  
(TOP VIEW)  
D
D
Control Inputs V /V Levels are  
IH IL  
Referenced to V  
Voltage  
CCA  
V
Isolation Feature − If Either V  
Input  
CC  
CC  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1DIR  
1B1  
1B2  
GND  
1B3  
1B4  
1OE  
1A1  
1A2  
GND  
1A3  
1A4  
Is at GND, Both Ports Are in the  
High-Impedance State  
2
3
D
D
Overvoltage-Tolerant Inputs/Outputs Allow  
Mixed-Voltage-Mode Data Communications  
4
5
Fully Configurable Dual-Rail Design Allows  
Each Port to Operate Over the Full 1.65-V to  
5.5-V Power-Supply Range  
6
7
V
V
CCB  
1B5  
CCA  
8
1A5  
1A6  
GND  
1A7  
1A8  
2A1  
2A2  
GND  
2A3  
2A4  
D
I
Supports Partial-Power-Down Mode  
9
1B6  
GND  
1B7  
1B8  
2B1  
2B2  
GND  
2B3  
2B4  
off  
Operation  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
description/ordering information  
This 16-bit noninverting bus transceiver uses two  
separate configurable power-supply rails. The  
A port is designed to track V  
. V  
accepts  
CCA CCA  
any supply voltage from 1.65 V to 5.5 V. The B port  
is designed to track V . V accepts any  
CCB  
CCB  
V
V
CCB  
2B5  
CCA  
supply voltage from 1.65 V to 5.5 V. This allows for  
universal low-voltage bidirectional translation  
between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V  
voltage nodes.  
2A5  
2A6  
GND  
2A7  
2A8  
2OE  
2B6  
GND  
2B7  
2B8  
2DIR  
The  
SN74LVC16T245  
is  
designed  
for  
asynchronous communication between data  
buses. The device transmits data from the A bus  
to the B bus or from the B bus to the A bus,  
depending on the logic level at the  
direction-control (DIR) input. The output-enable  
(OE) input can be used to disable the outputs so  
the buses are effectively isolated.  
The SN74LVC16T245 is designed so that the  
control pins (1DIR, 2DIR, 1OE, and 2OE) are  
supplied by V  
.
CCA  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
TSSOP − DGG Tape and reel SN74LVC16T245DGGR  
−40°C to 85°C  
TVSOP − DGV  
VFBGA − GQL  
Tape and reel SN74LVC16T245DGVR  
Tape and reel SN74LVC16T245GQLR  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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ꢨꢥ ꢦ ꢜ ꢬꢝ ꢧꢪ ꢢ ꢦ ꢥ ꢟꢞ ꢨꢥ ꢫ ꢥ ꢭꢟ ꢧꢡꢥ ꢝꢣꢮ ꢆ ꢪꢢ ꢠꢢ ꢤꢣ ꢥꢠ ꢜꢦ ꢣꢜ ꢤ ꢨꢢ ꢣꢢ ꢢꢝ ꢨ ꢟꢣ ꢪꢥꢠ  
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Copyright 2004, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...17

中文翻译

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SN74LVC16T245 替代型号

型号 品牌 替代类型 描述 数据表
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