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SN74LS290D PDF预览

SN74LS290D

更新时间: 2024-09-08 23:06:19
品牌 Logo 应用领域
安森美 - ONSEMI 计数器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
5页 78K
描述
DECADE COUNTER; 4-BIT BINARY COUNTER

SN74LS290D 数据手册

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SN54/74LS290  
SN54/74LS293  
DECADE COUNTER;  
4-BIT BINARY COUNTER  
The SN54/74LS290 and SN54/74LS293 are high-speed 4-bit ripple type  
counters partitioned into two sections. Each counter has a divide-by-two sec-  
tion and either a divide-by-five (LS290) or divide-by-eight (LS293) section  
which are triggered by a HIGH-to-LOW transition on the clock inputs. Each  
section can be used separately or tied together (Q to CP)to form BCD,  
Bi-quinary, or Modulo-16 counters. Both of the counters have a 2-input gated  
Master Reset (Clear), and the LS290 also has a 2-input gated Master Set  
(Preset 9).  
DECADE COUNTER;  
4-BIT BINARY COUNTER  
LOW POWER SCHOTTKY  
Corner Power Pin Versions of the LS90 and LS93  
Low Power Consumption . . . Typically 45 mW  
High Count Rates . . . Typically 42 MHz  
Choice of Counting Modes . . . BCD, Bi-Quinary, Binary  
Input Clamp Diodes Limit High Speed Termination Effects  
J SUFFIX  
CERAMIC  
CASE 632-08  
14  
1
CONNECTION DIAGRAM DIP (TOP VIEW)  
V
MR  
13  
MR  
CP  
CP  
Q
Q
3
CC  
1
0
0
N SUFFIX  
PLASTIC  
CASE 646-06  
14  
12  
11  
10  
9
8
14  
NOTE:  
1
The Flatpak version  
has the same pinouts  
(Connection Diagram) as  
the Dual In-Line Package.  
LS290  
D SUFFIX  
SOIC  
CASE 751A-02  
14  
1
2
3
4
5
6
7
1
MS  
NC  
MS  
Q
Q
NC  
GND  
2
1
V
MR  
13  
MR  
12  
CP  
CP  
Q
Q
3
CC  
14  
1
0
0
ORDERING INFORMATION  
11  
10  
9
8
SN54LSXXXJ  
Ceramic  
SN74LSXXXN Plastic  
SN74LSXXXD SOIC  
LS293  
1
2
3
4
5
6
7
NC  
NC  
NC  
Q
Q
NC  
GND  
2
1
PIN NAMES  
LOADING (Note a)  
HIGH  
LOW  
1.5 U.L.  
2.0 U.L.  
1.0 U.L.  
0.25 U.L.  
0.25 U.L.  
5 (2.5) U.L.  
5 (2.5) U.L.  
CP  
CP1  
CP1  
MR1, MR2  
MS1, MS2  
Q0  
Clock (Active LOW going edge) Input to ÷2 Section.  
Clock (Active LOW going edge) Input to ÷5 Section (LS290).  
Clock (Active LOW going edge) Input to ÷8 Section (LS293).  
Master Reset (Clear) Inputs  
Master Set (Preset-9, LS290) Inputs  
Output from ÷2 Section (Notes b & c)  
0.05 U.L.  
0.05 U.L.  
0.05 U.L.  
0.5 U.L.  
0.5 U.L.  
10 U.L.  
0
Q1, Q2, Q3  
Outputs from ÷5 & ÷8 Sections (Note b)  
10 U.L.  
NOTES:  
a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.  
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74) Temperature Ranges.  
c) The Q Outputs are guaranteed to drive the full fan-out plus the CP Input of the device.  
0
1
FAST AND LS TTL DATA  
5-1  

SN74LS290D 替代型号

型号 品牌 替代类型 描述 数据表
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