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SN74HCT257NE4 PDF预览

SN74HCT257NE4

更新时间: 2024-11-20 20:32:31
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 光电二极管逻辑集成电路
页数 文件大小 规格书
13页 449K
描述
Multiplexer, HCT Series, 4-Func, 2 Line Input, 1 Line Output, True Output, CMOS, PDIP16, ROHS COMPLIANT, PLASTIC, MS-001BB, DIP-16

SN74HCT257NE4 技术参数

生命周期:Contact Manufacturer包装说明:DIP,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.65Is Samacsys:N
系列:HCTJESD-30 代码:R-PDIP-T16
长度:19.305 mm逻辑集成电路类型:MULTIPLEXER
功能数量:4输入次数:2
输出次数:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
传播延迟(tpd):48 ns座面最大高度:5.08 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL宽度:7.62 mm
Base Number Matches:1

SN74HCT257NE4 数据手册

 浏览型号SN74HCT257NE4的Datasheet PDF文件第2页浏览型号SN74HCT257NE4的Datasheet PDF文件第3页浏览型号SN74HCT257NE4的Datasheet PDF文件第4页浏览型号SN74HCT257NE4的Datasheet PDF文件第5页浏览型号SN74HCT257NE4的Datasheet PDF文件第6页浏览型号SN74HCT257NE4的Datasheet PDF文件第7页 
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ꢑ ꢅ  
ꢙ ꢓꢆ ꢄ ꢚ ꢒꢀꢆꢌꢆ ꢑ ꢔ ꢋꢆ ꢏ ꢋꢆ  
SCLS072D − NOVEMBER 1988 − REVISED SEPTEMBER 2003  
D
D
D
D
D
Operating Voltage Range of 4.5 V to 5.5 V  
D
D
D
D
Low Input Current of 1 µA Max  
Inputs Are TTL-Voltage Compatible  
High-Current 3-State Outputs Interface  
Directly With System Bus  
Provide Bus Interface From Multiple  
Sources in High-Performance Systems  
Typical t = 17 ns  
pd  
Low Power Consumption, 80-µA Max I  
Buffered Inputs and Outputs  
CC  
6-mA Output Drive at 5 V  
SN54HCT257 . . . FK PACKAGE  
(TOP VIEW)  
SN54HCT257 . . . J PACKAGE  
SN74HCT257 . . . D OR N PACKAGE  
(TOP VIEW)  
A/B  
1A  
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
3
2
1
20 19  
18  
OE  
4A  
4B  
4A  
4B  
NC  
1B  
1Y  
NC  
2A  
2B  
4
5
6
7
8
1B  
17  
16  
1Y  
2A  
12 4Y  
15 4Y  
14  
9 10 11 12 13  
11  
10  
9
2B  
3A  
3B  
3Y  
3A  
2Y  
GND  
NC − No internal connection  
description/ordering information  
The ’HCT257 devices are designed to multiplex signals from 4-bit data sources to 4-output data lines in  
bus-organized systems. The 3-state outputs do not load the data lines when the output-enable (OE) input is at  
the high logic level.  
To ensure the high-impedance state during power up or power down, OE should be tied to V  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup  
CC  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
SOIC − D  
Tube of 25  
Tube of 40  
Reel of 2500  
Reel of 250  
Tube of 25  
Tube of 55  
SN74HCT257N  
SN74HCT257D  
SN74HCT257DR  
SN74HCT257DT  
SNJ54HCT257J  
SNJ54HCT257FK  
SN74HCT257N  
−40°C to 85°C  
HCT257  
CDIP − J  
SNJ54HCT257J  
−55°C to 125°C  
LCCC − FK  
SNJ54HCT257FK  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢋ ꢁ ꢐꢑꢀꢀ ꢔ ꢆꢄ ꢑꢎꢙ ꢓꢀ ꢑ ꢁ ꢔꢆꢑꢍ ꢛꢜ ꢝꢞ ꢟꢠꢡ ꢢꢣꢤ ꢥꢛ ꢡꢠ ꢥꢛꢦ ꢝꢥꢞ ꢏꢎ ꢔ ꢍ ꢋ ꢅꢆ ꢓꢔ ꢁ  
ꢩꢦ ꢨ ꢦ ꢣ ꢤ ꢛ ꢤ ꢨ ꢞ ꢬ  
ꢡꢤ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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