SN54HCT32, SN74HCT32
QUADRUPLE 2-INPUT POSITIVE-OR GATES
SCLS064B – NOVEMBER 1988 – REVISED MAY 1997
SN54HCT32 . . . J OR W PACKAGE
SN74HCT32 . . . D, DB, N, OR PW PACKAGE
(TOP VIEW)
Inputs Are TTL-Voltage Compatible
Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW),
and Ceramic Flat (W) Packages,
Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J)
300-mil DIPs
1A
1B
V
CC
1
2
3
4
5
6
7
14
13
12
11
4B
4A
4Y
1Y
2A
2B
10 3B
9
8
2Y
3A
3Y
description
GND
The ’HCT32 contain four independent 2-input OR
gates. They perform the Boolean function
SN54HCT32 . . . FK PACKAGE
(TOP VIEW)
Y
A • B or Y
A
B
in positive logic.
The SN54HCT32 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74HCT32 is characterized for
operation from –40°C to 85°C.
3
2
1
20 19
18
4A
NC
4Y
1Y
NC
2A
4
5
6
7
8
17
16
FUNCTION TABLE
(each gate)
15 NC
14
9 10 11 12 13
NC
2B
3B
INPUTS
OUTPUT
Y
A
B
X
H
L
H
X
L
H
H
L
NC – No internal connection
†
logic symbol
1
1A
2
≥1
3
1Y
1B
4
2A
5
6
2Y
2B
9
3A
8
10
3Y
3B
4A
4B
12
13
11
4Y
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, DB, J, N, PW, and W packages.
logic diagram (positive logic)
A
B
Y
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1997, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
1
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