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SN74F74D-00 PDF预览

SN74F74D-00

更新时间: 2024-09-15 15:52:11
品牌 Logo 应用领域
德州仪器 - TI 光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
17页 833K
描述
F/FAST SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14

SN74F74D-00 技术参数

生命周期:Obsolete包装说明:SOP,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.64系列:F/FAST
JESD-30 代码:R-PDSO-G14长度:8.65 mm
逻辑集成电路类型:D FLIP-FLOP位数:1
功能数量:2端子数量:14
最高工作温度:70 °C最低工作温度:
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE传播延迟(tpd):9.2 ns
认证状态:Not Qualified座面最大高度:1.75 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL触发器类型:POSITIVE EDGE
宽度:3.9 mm最小 fmax:145 MHz
Base Number Matches:1

SN74F74D-00 数据手册

 浏览型号SN74F74D-00的Datasheet PDF文件第2页浏览型号SN74F74D-00的Datasheet PDF文件第3页浏览型号SN74F74D-00的Datasheet PDF文件第4页浏览型号SN74F74D-00的Datasheet PDF文件第5页浏览型号SN74F74D-00的Datasheet PDF文件第6页浏览型号SN74F74D-00的Datasheet PDF文件第7页 
SN54F74, SN74F74  
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS  
WITH CLEAR AND PRESET  
SDFS046A – MARCH 1987 – REVISED OCTOBER 1993  
SN54F74 . . . J PACKAGE  
SN74F74 . . . D OR N PACKAGE  
Package Options Include Plastic  
Small-Outline Packages, Ceramic Chip  
Carriers, and Standard Plastic and Ceramic  
300-mil DIPs  
(TOP VIEW)  
1CLR  
1D  
1CLK  
1PRE  
1Q  
V
CC  
2CLR  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
description  
2D  
These devices contain two independent positive-  
edge-triggered D-type flip-flops. A low level at the  
preset (PRE) or clear (CLR) inputs sets or resets  
the outputs regardless of the levels of the other  
inputs. When PRE and CLR are inactive (high),  
data at the data (D) input meeting the setup time  
requirements is transferred to the outputs on the  
positive-going edge of the clock pulse. Clock  
triggering occurs at a voltage level and is not  
directly related to the rise time of the clock pulse.  
Following the hold-time interval, data at the  
D input may be changed without affecting the  
levels at the outputs.  
2CLK  
2PRE  
2Q  
1Q  
GND  
2Q  
8
SN54F74 . . . FK PACKAGE  
(TOP VIEW)  
3
2
1
20 19  
18  
1CLK  
NC  
2D  
17 NC  
4
5
6
7
8
16  
15  
14  
1PRE  
NC  
2CLK  
NC  
The SN54F74 is characterized for operation over  
the full military temperature range of 55°C to  
125°C. The SN74F74 is characterized for  
operation from 0°C to 70°C.  
1Q  
2PRE  
9 10 11 12 13  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
NC – No internal connection  
PRE  
L
CLR  
CLK  
X
D
X
X
X
H
L
Q
H
L
Q
L
H
L
H
X
H
H
L
L
X
H
H
H
H
H
H
L
L
H
H
H
L
X
Q
Q
0
0
The output levels are not guaranteed to meet the  
minimum levels for Furthermore, this  
V
OH  
.
configuration is nonstable; that is, it will not persist  
when PRE or CLR returns to its inactive (high)  
level.  
Copyright 1993, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
2–1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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