5秒后页面跳转
捷配首页

Datasheet > SN74F169D-00R
SN74F169D-00R PDF预览

SN74F169D-00R

更新时间： 2024-09-16 15:52:11
品牌 Logo 应用领域
德州仪器 - TI 光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
13页 296K
描述
F/FAST SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PDSO16

阅读下载

中文翻译

获取价格

SN74F169D-00R 技术参数

生命周期：ObsoleteReach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.65
Is Samacsys：N其他特性：TCO OUTPUT
计数方向：BIDIRECTIONAL系列：F/FAST
JESD-30 代码：R-PDSO-G16长度：9.9 mm
负载/预设输入：YES逻辑集成电路类型：BINARY COUNTER
工作模式：SYNCHRONOUS位数：4
功能数量：1端子数量：16
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
传播延迟（tpd）：13 ns认证状态：Not Qualified
座面最大高度：1.75 mm标称供电电压 (Vsup)：5 V
表面贴装：YES技术：TTL
温度等级：COMMERCIAL端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
触发器类型：POSITIVE EDGE宽度：3.9 mm
最小 fmax：115 MHzBase Number Matches：1

SN74F169D-00R 数据手册

 浏览型号SN74F169D-00R的Datasheet PDF文件第2页浏览型号SN74F169D-00R的Datasheet PDF文件第3页浏览型号SN74F169D-00R的Datasheet PDF文件第4页浏览型号SN74F169D-00R的Datasheet PDF文件第5页浏览型号SN74F169D-00R的Datasheet PDF文件第6页浏览型号SN74F169D-00R的Datasheet PDF文件第7页 
ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢇ  
ꢀꢈ ꢁꢉꢊꢋꢌ ꢁꢌ ꢍꢀ ꢎꢃ ꢏꢐꢑꢒ ꢎ ꢍꢓꢔꢕ ꢌꢖ ꢁꢎꢐꢑ ꢁꢗꢋꢈꢎꢉꢌ ꢍ ꢁꢒ ꢘꢋ  
ꢙ
SDFS089 − MARCH 1987 − REVISED OCTOBER 1993  
D OR N PACKAGE  
(TOP VIEW)  
• Fully Synchronous Operation for Counting  
and Programming  
• Internal Look-Ahead Circuitry for Fast  
V
RCO  
Q
U/D  
CLK  
A
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC  
Counting  
• Carry Output for N-Bit Cascading  
• Fully Independent Clock Circuit  
A
Q
B
Q
B
C
D
• Package Options Include Plastic  
Small-Outline Packages and Standard  
Plastic 300-mil DIPs  
C
Q
D
ENT  
ENP  
GND  
LOAD  
description  
This synchronous, presettable, 4-bit up/down binary counter features an internal carry look-ahead circuitry for  
cascading in high-speed counting applications. Synchronous operation is provided by having all flip-flops  
clocked simultaneously so that the outputs change coincident with each other when so instructed by the  
count-enable (ENP, ENT) inputs and internal gating. This mode of operation eliminates the output counting  
spikes that are normally associated with asynchronous (ripple-clock) counters. A buffered clock (CLK) input  
triggers the four flip-flops on the rising (positive-going) edge of the clock waveform.  
This counter is fully programmable; that is, it may be preset to any number between 0 and its maximum count.  
The load-input circuitry allows loading with the carry-enable output of cascaded counters. As loading is  
synchronous, setting up a low level at the load (LOAD) input disables the counter and causes the outputs to  
agree with the data inputs after the next clock pulse.  
The carry look-ahead circuitry provides for cascading counters for n-bit synchronous application without  
additional gating. Instrumental in accomplishing this function are two count-enable (ENP, ENT) inputs and a  
ripple-carry (RCO) output. Both ENP and ENT must be low to count. The direction of the count is determined  
by the level of the up/down (U/D) input. When U/D is high, the counter counts up; when low, it counts down. Input  
ENT is fed forward to enable the RCO. RCO thus enabled will produce a low-level pulse while the count is zero  
(all inputs low) counting down or maximum (9 or 15) counting up. This low-level overflow ripple-carry pulse can  
be used to enable successive cascaded stages. Transitions at ENP or ENT are allowed regardless of the level  
of the clock input. All inputs are diode clamped to minimize transmission-line effects, thereby simplifying system  
design.  
The SN74F169 features a fully independent clock circuit. Changes at control inputs (ENP, ENT, LOAD or U/D)  
that will modify the operating mode have no effect on the contents of the counter until clocking occurs. The  
function of the counter (whether enabled, disabled, loading, or counting) will be dictated solely by the conditions  
meeting the setup and hold times.  
The SN74F169 is characterized for operation from 0°C to 70°C.  
ꢓ
ꢋ
ꢌ
ꢕ
ꢍ
ꢉ
ꢒ
ꢑ
ꢌ
ꢁ
ꢕ
ꢗ
ꢒ
ꢗ
ꢚ
ꢛ
ꢜ
ꢝ
ꢞ
ꢟ
ꢠ
ꢡ
ꢚ
ꢝ
ꢛ
ꢚ
ꢢ
ꢣ
ꢤ
ꢞ
ꢞ
ꢥ
ꢛ
ꢡ
ꢠ
ꢢ
ꢝ
ꢜ
ꢦ
ꢤ
ꢧ
ꢨ
ꢚ
ꢣ
ꢠ
ꢡ
ꢚ
ꢝ
ꢛ
ꢩ
ꢠ
ꢡ
ꢥ
ꢪ
Copyright 1993, Texas Instruments Incorporated  
ꢓꢞ ꢝ ꢩꢤꢣ ꢡ ꢢ ꢣ ꢝꢛ ꢜꢝ ꢞ ꢟ ꢡ ꢝ ꢢ ꢦꢥ ꢣ ꢚꢜ ꢚꢣꢠ ꢡꢚ ꢝꢛꢢ ꢦꢥ ꢞ ꢡꢫ ꢥ ꢡꢥ ꢞ ꢟꢢ ꢝꢜ ꢒꢥꢬ ꢠꢢ ꢑꢛꢢ ꢡꢞ ꢤꢟ ꢥꢛꢡ ꢢ  
ꢢ ꢡ ꢠ ꢛꢩ ꢠ ꢞꢩ ꢭ ꢠ ꢞꢞ ꢠ ꢛ ꢡꢮꢪ ꢓꢞ ꢝ ꢩꢤꢣ ꢡꢚꢝꢛ ꢦꢞ ꢝꢣ ꢥꢢ ꢢꢚ ꢛꢯ ꢩꢝꢥ ꢢ ꢛꢝꢡ ꢛꢥ ꢣꢥ ꢢꢢ ꢠꢞ ꢚꢨ ꢮ ꢚꢛꢣ ꢨꢤꢩ ꢥ  
ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ  
2−1  
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443  
1234567...13

中文翻译

下载PDF

与SN74F169D-00R相关器件

型号 品牌 获取价格 描述 数据表
SN74F169D3 ROCHESTER

获取价格

 		Binary Counter,
SN74F169D3 TI

获取价格

 		IC,COUNTER,UP/DOWN,4-BIT BINARY,F-TTL,SOP,16PIN,PLASTIC
SN74F169DE4 ROCHESTER

获取价格

 		Binary Counter, F/FAST Series, Synchronous, Positive Edge Triggered, 4-Bit, Bidirectional,
SN74F169DG4 TI

获取价格

 		F/FAST SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PDSO16, GRE
SN74F169DG4 ROCHESTER

获取价格

 		Binary Counter, F/FAST Series, Synchronous, Positive Edge Triggered, 4-Bit, Bidirectional,
SN74F169DR TI

获取价格

 		F/FAST SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PDSO16, PLA
SN74F169DRE4 TI

获取价格

 		F/FAST SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PDSO16, PLA
SN74F169DRG4 TI

获取价格

 		F/FAST SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PDSO16, PLA
SN74F169N TI

获取价格

 		SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTER
SN74F169N-10 TI

获取价格

 		F/FAST SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PDIP16, PLA

与SN74F169D-00R相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证