SN74CBTLV1G125DCK

更新时间： 2024-11-05 13:13:47

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德州仪器 - TI		开关
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SN74CBTLV1G125DCK 数据手册

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SN74CBTLV1G125

LOW-VOLTAGE SINGLE FET BUS SWITCH

www.ti.com

SCDS057H–MARCH 1998–REVISED JUNE 2006

FEATURES

•

5-Ω Switch Connection Between Two Ports

•

I_offSupports Partial-Power-Down Mode

Operation

Rail-to-Rail Switching on Data I/O Ports

DBV PACKAGE

(TOP VIEW)

DCK PACKAGE

(TOP VIEW)

V_CC

GND

See mechanical drawings for dimensions.

DESCRIPTION/ORDERING INFORMATION

The SN74CBTLV1G125 features a single high-speed line switch. The switch is disabled when the output-enable

(OE) input is high.

This device is fully specified for partial-power-down applications using I_off. The I_offfeature ensures that damaging

current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CCthrough a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

ORDERING INFORMATION

T_A

PACKAGE⁽¹⁾

ORDERABLE PART NUMBER

SN74CBTLV1G125DBVR

TOP-SIDE MARKING⁽²⁾

SOT (SOT-23) – DBV Reel of 3000

V25_

VM_

–40°C to 85°C

SOT (SC-70) – DCK

Reel of 3000

SN74CBTLV1G125DCKR

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2) The actual top-side marking has one additional character that designates the assembly/test site.

FUNCTION TABLE

INPUT

FUNCTION

A port = B port

Disconnect

LOGIC DIAGRAM (POSITIVE LOGIC)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...10

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