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SN74CBTK32245GKE PDF预览

SN74CBTK32245GKE

更新时间: 2024-11-02 19:08:39
品牌 Logo 应用领域
德州仪器 - TI 驱动输出元件逻辑集成电路
页数 文件大小 规格书
12页 808K
描述
CBT/FST/QS/5C/B SERIES, QUAD 8-BIT DRIVER, TRUE OUTPUT, PBGA96, FBGA-96

SN74CBTK32245GKE 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:BGA包装说明:LFBGA, BGA96,6X16,32
针数:96Reach Compliance Code:not_compliant
风险等级:5.91系列:CBT/FST/QS/5C/B
JESD-30 代码:R-PBGA-B96长度:13.5 mm
逻辑集成电路类型:BUS DRIVER位数:8
功能数量:4端口数量:2
端子数量:96最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:LFBGA封装等效代码:BGA96,6X16,32
封装形状:RECTANGULAR封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
传播延迟(tpd):0.35 ns认证状态:Not Qualified
座面最大高度:1.4 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5.5 mmBase Number Matches:1

SN74CBTK32245GKE 数据手册

 浏览型号SN74CBTK32245GKE的Datasheet PDF文件第2页浏览型号SN74CBTK32245GKE的Datasheet PDF文件第3页浏览型号SN74CBTK32245GKE的Datasheet PDF文件第4页浏览型号SN74CBTK32245GKE的Datasheet PDF文件第5页浏览型号SN74CBTK32245GKE的Datasheet PDF文件第6页浏览型号SN74CBTK32245GKE的Datasheet PDF文件第7页 
ꢀꢁꢂ ꢃ ꢄ ꢅꢆ ꢇꢈ ꢉꢉ ꢃꢊ  
ꢈ ꢉ ꢋꢅꢌ ꢆ ꢍ ꢎꢆ ꢅꢏꢀ ꢀ ꢐꢌ ꢆꢄ ꢑ  
ꢐ ꢌ ꢆꢑ ꢒꢄꢆ ꢌ ꢓꢎꢋꢄꢔ ꢒꢕ ꢖ ꢏꢁꢗ ꢎꢘꢀꢑ ꢙꢙ ꢆꢋꢖꢘ ꢙꢆ ꢎꢄ ꢆꢌ ꢙ ꢁ ꢄ ꢌꢘ ꢄꢏ ꢌ ꢆ  
SCDS106E − APRIL 2000 − REVISED SEPTEMBER 2003  
D
D
D
D
Member of the Texas Instruments  
Widebus+Family  
5-Switch Connection Between Two Ports  
TTL-Compatible Input Levels  
D
D
D
Flow-Through Architecture Optimizes PCB  
Layout  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
I
Supports Partial-Power-Down Mode  
off  
Operation  
D
Active-Clamp Undershoot-Protection  
Circuit on the I/Os Clamps Undershoots Up  
To −2 V  
− 1000-V Charged-Device Model (C101)  
description/ordering information  
The SN74CBTK32245 provides 32 bits of high-speed TTL-compatible bus switching. The low on-state  
resistance of the switch allows connections to be made with minimal propagation delay.  
The A and B ports have an active-clamp undershoot-protection circuit. When there is an undershoot, the  
active-clamp circuit is enabled and current from V  
transistor from turning on.  
is supplied to clamp the output, preventing the pass  
CC  
The device is organized as four 8-bit bus switches, two 16-bit bus switches, or one 32-bit bus switch. When the  
output-enable (OE) input is low, the switch is on and port A is connected to port B. When OE is high, the switch  
is open and the high-impedance state exists between the two ports.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
LFBGA − GKE  
LFBGA − ZKE (Pb-free)  
SN74CBTK32245GKER  
SN74CBTK32245ZKER  
−40°C to 85°C  
Tape and reel  
KT245  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
FUNCTION TABLE  
(each 8-bit bus switch)  
INPUT  
FUNCTION  
OE  
L
A port = B port  
Disconnect  
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus+ is a trademark of Texas Instruments.  
ꢆꢥ  
Copyright 2003, Texas Instruments Incorporated  
ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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