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SN74CBTLV16210_08 PDF预览

SN74CBTLV16210_08

更新时间： 2024-11-02 05:17:35
品牌 Logo 应用领域
德州仪器 - TI 开关
页数 文件大小 规格书
11页 344K
描述
LOW-VOLTAGE 20-BIT FET BUS SWITCH

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SN74CBTLV16210_08 数据手册

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SCDS042J − DECEMBER 1997 − REVISED JULY 2004  
DGV OR DL PACKAGE  
(TOP VIEW)  
D
Member of the Texas Instruments  
WidebusFamily  
D
D
D
5-Ω Switch Connection Between Two Ports  
Rail-to-Rail Switching on Data I/O Ports  
1
48  
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NC  
1A1  
1A2  
1A3  
1A4  
1A5  
1A6  
GND  
1A7  
1A8  
1A9  
1A10  
2A1  
2A2  
1OE  
2OE  
1B1  
1B2  
1B3  
1B4  
1B5  
GND  
1B6  
1B7  
1B8  
1B9  
1B10  
2B1  
2B2  
2B3  
GND  
2B4  
2B5  
2B6  
2B7  
2B8  
2B9  
2B10  
2
I
Supports Partial-Power-Down Mode  
3
off  
Operation  
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5
description/ordering information  
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7
The SN74CBTLV16210 provides 20 bits of  
high-speed bus switching. The low on-state  
resistance of the switch allows connections to be  
made with minimal propagation delay.  
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The device is organized as dual 10-bit bus  
switches with separate output-enable (OE)  
inputs. It can be used as two 10-bit bus switches  
or as one 20-bit bus switch. When OE is low, the  
associated 10-bit bus switch is on, and port A is  
connected to port B. When OE is high, the switch  
is open, and the high-impedance state exists  
between the two ports.  
V
CC  
2A3  
GND  
2A4  
2A5  
2A6  
2A7  
2A8  
2A9  
2A10  
This  
device  
is  
fully  
specified  
for  
partial-power-down applications using I . The I  
off  
off  
feature ensures that damaging current will not  
backflow through the device when it is powered  
down. The device has isolation during power off.  
To ensure the high-impedance state during power  
NC − No internal connection  
up or power down, OE should be tied to V  
CC  
through a pullup resistor; the minimum value of  
the resistor is determined by the current-sinking  
capability of the driver.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
Tube  
SN74CBTLV16210DL  
SN74CBTLV16210DLR  
SN74CBTLV16210VR  
SSOP − DL  
CBTLV16210  
CN210  
−40°C to 85°C  
Tape and reel  
Tape and reel  
TVSOP − DGV  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
FUNCTION TABLE  
(each 10-bit bus switch)  
INPUT  
FUNCTION  
OE  
L
A port = B port  
Disconnect  
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
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Copyright 2004, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...11

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