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SN74CBTLV16211DGG PDF预览

SN74CBTLV16211DGG

更新时间: 2024-11-18 22:40:07
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6页 84K
描述
LOW-VOLTAGE 24-BIT FET BUS SWITCH

SN74CBTLV16211DGG 数据手册

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SN74CBTLV16211  
LOW-VOLTAGE 24-BIT FET BUS SWITCH  
SCDS043E – DECEMBER 1997 – REVISED APRIL 1999  
DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
5-Switch Connection Between Two Ports  
Isolation Under Power-Off Conditions  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
1
56  
55  
54  
53  
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29  
NC  
1A1  
1A2  
1A3  
1A4  
1A5  
1A6  
GND  
1A7  
1A8  
1A9  
1A10  
1A11  
1A12  
2A1  
2A2  
1OE  
2OE  
1B1  
1B2  
1B3  
1B4  
1B5  
GND  
1B6  
1B7  
1B8  
1B9  
1B10  
1B11  
1B12  
2B1  
2B2  
2B3  
GND  
2B4  
2B5  
2B6  
2B7  
2B8  
2B9  
2B10  
2B11  
2B12  
2
3
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
4
5
6
Package Options Include Plastic Thin  
Shrink Small-Outline (DGG), Thin Very  
Small-Outline (DGV), and 300-mil Shrink  
Small-Outline (DL) Packages  
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10  
11  
12  
13  
14  
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17  
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description  
The SN74CBTLV16211 provides 24 bits of  
high-speed bus switching. The low on-state  
resistance of the switch allows connections to be  
made with minimal propagation delay.  
The device is organized as dual 12-bit bus  
switches with separate output-enable (OE)  
inputs. It can be used as two 12-bit bus switches  
or one 24-bit bus switch. When OE is low, the  
associated 12-bit bus switch is on and port A is  
connected to port B. When OE is high, the switch  
is open, and the high-impedance state exists  
between the two ports.  
V
CC  
2A3  
GND  
2A4  
2A5  
2A6  
2A7  
2A8  
2A9  
To ensure the high-impedance state during power  
up or power down, OE should be tied to V  
through a pullup resistor; the minimum value of  
the resistor is determined by the current-sinking  
capability of the driver.  
2A10  
2A11  
2A12  
CC  
NC – No internal connection  
The SN74CBTLV16211 is characterized for  
operation from –40°C to 85°C.  
FUNCTION TABLE  
(each 12-bit bus switch)  
INPUT  
FUNCTION  
OE  
L
A port = B port  
Disconnect  
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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