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ꢇ ꢉ ꢊꢅꢋ ꢆ ꢇ ꢊꢌ ꢍꢊ ꢎ ꢍ ꢏꢆ ꢐ ꢑꢒꢆ ꢋꢓ ꢒꢏ ꢔꢏꢕꢖ ꢗꢏꢐ ꢑꢒꢆꢋ ꢓ ꢒꢏ ꢔꢏ
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SCDS121B − JUNE 2003 − REVISED OCTOBER 2003
DGG OR DL PACKAGE
(TOP VIEW)
D
D
D
D
D
Member of the Texas Instruments
Widebus Family
Undershoot Protection for Off-Isolation on
A and B Ports Up To −2 V
S0
1A
S1
1
2
3
4
5
6
7
8
9
56
55
54
53
52
51
50
S2
Bidirectional Data Flow, With Near-Zero
Propagation Delay
1B3
2A
1B1
1B2
2B1
2B2
3B1
Low ON-State Resistance (r
)
2B3
3A
on
Characteristics (r = 3 Ω Typical)
on
3B3
GND
4A
Low Input/Output Capacitance Minimizes
Loading and Signal Distortion
49 GND
48 3B2
47 4B1
46 4B2
45 5B1
(C
= 5.5 pF Typical)
io(OFF)
4B3 10
5A 11
5B3 12
6A 13
D
D
Data and Control Inputs Provide
Undershoot Clamp Diodes
Low Power Consumption
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
5B2
(I
= 3 µA Max)
CC
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
6B3
7A
6B1
D
V
Operating Range From 4 V to 5.5 V
CC
6B2
D
Data I/Os Support 0 to 5-V Signaling Levels
(0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
7B3
7B1
V
7B2
CC
8A
8B1
D
D
D
D
Control Inputs Can Be Driven by TTL or
5-V/3.3-V CMOS Outputs
GND
8B3
9A
GND
8B2
I
Supports Partial-Power-Down Mode
off
9B1
Operation
9B3
10A
10B3
11A
9B2
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
10B1
10B2
11B1
11B2
12B1
12B2
ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
11B3
12A
12B3
− 1000-V Charged-Device Model (C101)
D
Supports Both Digital and Analog
Applications: PCI Interface, Bus Isolation,
Low-Distortion Signal Gating
description/ordering information
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
Tube
SN74CBT16214CDL
SN74CBT16214CDLR
SN74CBT16214CDGG
SN74CBT16214CDGGR
SSOP − DL
CBT16214C
CBT16214C
Tape and reel
Tube
−40°C to 85°C
TSSOP − DGG
Tape and reel
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
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Copyright 2003, Texas Instruments Incorporated
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ꢥ ꢩ ꢦ ꢥꢞ ꢟꢳ ꢡꢠ ꢤ ꢬꢬ ꢪꢤ ꢢ ꢤ ꢣ ꢩ ꢥ ꢩ ꢢ ꢦ ꢮ
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265