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SN74CBT16232DLG4 PDF预览

SN74CBT16232DLG4

更新时间: 2024-01-02 23:31:56
品牌 Logo 应用领域
德州仪器 - TI 解复用器
页数 文件大小 规格书
11页 286K
描述
SYNCHRONOUS 16-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER

SN74CBT16232DLG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP, SSOP56,.4针数:56
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.48系列:CBT/FST/QS/5C/B
JESD-30 代码:R-PDSO-G56JESD-609代码:e4
长度:18.415 mm逻辑集成电路类型:MULTIPLEXER AND DEMUX/DECODER
湿度敏感等级:1功能数量:16
输入次数:1输出次数:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP56,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:5 V
传播延迟(tpd):0.35 ns认证状态:Not Qualified
座面最大高度:2.79 mm子类别:Other Logic ICs
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.49 mm

SN74CBT16232DLG4 数据手册

 浏览型号SN74CBT16232DLG4的Datasheet PDF文件第2页浏览型号SN74CBT16232DLG4的Datasheet PDF文件第3页浏览型号SN74CBT16232DLG4的Datasheet PDF文件第4页浏览型号SN74CBT16232DLG4的Datasheet PDF文件第5页浏览型号SN74CBT16232DLG4的Datasheet PDF文件第6页浏览型号SN74CBT16232DLG4的Datasheet PDF文件第7页 
SN74CBT16232  
SYNCHRONOUS 16-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER  
www.ti.com  
SCDS009NMAY 1995REVISED JUNE 2007  
FEATURES  
DGG OR DL PACKAGE  
Member of the Texas Instruments Widebus™  
(TOP VIEW)  
Family  
1A  
2B1  
2B2  
3A  
1B1  
1
56  
5-Switch Connection Between Two Ports  
TTL-Compatible Input and Output Levels  
2
55 1B2  
54 2A  
3
3B1  
4
53  
DESCRIPTION/  
ORDERING INFORMATION  
4B1  
4B2  
5A  
5
52 3B2  
51 4A  
6
The SN74CBT16232 is a synchronous 16-bit 1-of-2  
FET multiplexer/demultiplexer used in applications in  
which two separate data paths must be multiplexed  
onto, or demultiplexed from, a single path.  
7
50 5B1  
8
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
6B1  
6B2  
7A  
8B1  
8B2  
GND  
5B2  
6A  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
7B1  
7B2  
8A  
Two select (S0 and S1) inputs control the data flow.  
A
clock (CLK) and a clock enable (CLKEN)  
synchronize the device operation. When CLKEN is  
high, the bus switch remains in the last clocked  
function.  
GND  
V
CC  
V
CC  
9A  
10B1  
10B2  
11A  
12B1  
12B2  
13A  
14B1  
14B2  
15A  
16B1  
16B2  
CLK  
9B1  
9B2  
10A  
11B1  
11B2  
12A  
13B1  
13B2  
14A  
15B1  
15B2  
16A  
S0  
CLKEN  
S1  
ORDERING INFORMATION  
TA  
PACKAGE(1)(2)  
ORDERABLE PART NUMBER  
SN74CBT16232DL  
TOP-SIDE MARKING  
Tube  
SSOP – DL  
CBT16232  
CBT16232  
–40°C to 85°C  
Tape and reel  
Tape and reel  
SN74CBT16232DLR  
TSSOP – DGG  
SN74CBT16232DGGR  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
website at www.ti.com.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1995–2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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