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SN74BCT544DW-00 PDF预览

SN74BCT544DW-00

更新时间： 2024-09-16 15:52:11
品牌 Logo 应用领域
德州仪器 - TI 信息通信管理光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
12页 313K
描述
BCT/FBT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24

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SN74BCT544DW-00 技术参数

生命周期：Obsolete包装说明：SOP,
Reach Compliance Code：unknown风险等级：5.73
其他特性：INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; MASTER CONTROL FOR LATCH系列：BCT/FBT
JESD-30 代码：R-PDSO-G24长度：15.4 mm
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER位数：8
功能数量：1端口数量：2
端子数量：24最高工作温度：70 °C
最低工作温度：输出特性：3-STATE
输出极性：INVERTED封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE认证状态：Not Qualified
座面最大高度：2.65 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：BICMOS
温度等级：COMMERCIAL端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
宽度：7.5 mmBase Number Matches：1

SN74BCT544DW-00 数据手册

 浏览型号SN74BCT544DW-00的Datasheet PDF文件第2页浏览型号SN74BCT544DW-00的Datasheet PDF文件第3页浏览型号SN74BCT544DW-00的Datasheet PDF文件第4页浏览型号SN74BCT544DW-00的Datasheet PDF文件第5页浏览型号SN74BCT544DW-00的Datasheet PDF文件第6页浏览型号SN74BCT544DW-00的Datasheet PDF文件第7页 
SN54BCT544, SN74BCT544  
OCTAL REGISTERED TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS039B – NOVEMBER 1988 – REVISED NOVEMBER 1993  
SN54BCT544 . . . JT OR W PACKAGE  
SN74BCT544 . . . DW OR NT PACKAGE  
(TOP VIEW)  
• State-of-the-Art BiCMOS Design  
Significantly Reduces I  
CCZ  
• ESD Protection Exceeds 2000 V  
Per MIL-STD-883C, Method 3015  
LEBA  
OEBA  
A1  
1
2
3
4
5
6
7
8
9
10  
24  
V
CC  
• Power-Up High-Impedance State  
• 3-State Inverting Outputs  
• Back-to-Back Registers for Storage  
23 CEBA  
22 B1  
21 B2  
20 B3  
19 B4  
18 B5  
17 B6  
16 B7  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
• Package Options Include Plastic  
Small-Outline (DW) Packages, Ceramic  
Chip Carriers (FK) and Flatpacks (W), and  
Plastic and Ceramic 300-mil DIPs (JT, NT)  
15  
B8  
description  
CEAB 11  
GND 12  
14 LEAB  
13 OEAB  
The ′BCT544 octal registered transceiver  
contains two sets of D-type latches for temporary  
storage of data flowing in either direction.  
Separate latch-enable (LEAB or LEBA) and  
output-enable (OEAB or OEBA) inputs are  
provided for each register to permit independent  
control in either direction of data flow.  
SN54BCT544 . . . FK PACKAGE  
(TOP VIEW)  
The A-to-B enable (CEAB) input must be low in  
order to enter data from A or to output data from  
B. If CEAB is low and LEAB is low, the A-to-B  
latches are transparent; a subsequent low-to-high  
transitionofLEABputstheAlatchesinthestorage  
mode. With CEAB and OEAB both low, the 3-state  
B outputs are active and reflect the inverted data  
present at the output of the A latches. Data flow  
from B to A is similar, but requires using the CEBA,  
LEBA, and OEBA inputs.  
4
3
2
1
28 27 26  
25  
5
6
7
8
9
A2  
A3  
A4  
NC  
A5  
A6  
A7  
B2  
B3  
B4  
24  
23  
22 NC  
21 B5  
20 B6  
19 B7  
10  
11  
12 13 14 15 16 17 18  
The SN54BCT544 is characterized for operation  
over the full military temperature range of –55°C  
to 125°C. The SN74BCT544 is characterized for  
operation from 0°C to 70°C.  
NC – No internal connection  
†
FUNCTION TABLE  
INPUTS  
OUTPUT  
B
CEAB  
LEAB  
OEAB  
A
X
X
X
L
H
L
L
L
L
X
X
H
L
X
H
L
Z
Z
‡
B
0
L
H
L
L
L
H
†
‡
A-to-B data flow is shown; B-to-A flow control is the same  
except that it uses CEBA, LEBA, and OEBA.  
Output level before the indicated steady-state input  
conditions were established.  
Copyright 1993, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...12

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