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SN74AUP1T58 PDF预览

SN74AUP1T58

更新时间: 2024-09-15 22:27:35
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
17页 304K
描述
SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS

SN74AUP1T58 数据手册

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SN74AUP1T98  
SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR  
WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS  
www.ti.com  
SCES614AOCTOBER 2004REVISED SEPTEMBER 2005  
FEATURES  
Available in the Texas Instruments  
NanoStar™ and NanoFree™ Packages  
200-ns/V Input Rise/Fall Time Allows Slow  
Transition of Input Signal  
Single-Supply Voltage Translator  
1.8 V to 3.3 V (at VCC = 3.3 V)  
2.5 V to 3.3 V (at VCC = 3.3 V)  
1.8 V to 2.5 V (at VCC = 2.5 V)  
3.3 V to 2.5 V (at VCC = 2.5 V)  
Nine Configurable Gate Logic Functions  
Very Low Static and Dynamic Power  
Consumption  
Pb-Free Packages Available: SOT-23 (DBV),  
SC-70 (DCK), and WCSP (NanoFree)  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Performance Tested Per JESD 22  
Schmitt-Trigger Inputs Reject Input Noise and  
Provide Better Output Signal Integrity  
– 2000-V Human-Body Model  
(A114-B, Class II)  
Ioff Supports Partial-Power-Down Mode With  
Low Leakage Current (0.5 µA)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
Related Devices: SN74AUP1T97,  
SN74AUP1T57, and SN74AUP1T58  
DBV OR DCK PACKAGE  
(TOP VIEW)  
YEP OR YZP PACKAGE  
(BOTTOM VIEW)  
3
2
1
4
5
6
A
GND  
B
Y
V
1
2
3
6
5
4
B
GND  
A
C
V
Y
CC  
CC  
C
DESCRIPTION/ORDERING INFORMATION  
AUP technology is the industry's lowest-power logic technology designed for use in battery-operated or battery  
backed-up equipment. The SN74AUP1T98 is designed for logic-level translation applications with input switching  
levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCC supply.  
The wide VCC range of 2.3 V to 3.6 V allows the possibility of battery voltage drop during system operation and  
ensures normal operation between this range.  
Schmitt-trigger inputs (VT = 210 mV between positive and negative input transitions) offer improved noise  
immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger  
inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition.  
The SN74AUP1T98 can be easily configured to perform a required gate function by connecting A, B, and C  
inputs to VCC or ground (see Function Selection table). Up to nine commonly used logic gate functions can be  
performed.  
Ioff is a feature that allows for powered-down conditions (VCC = 0 V) and is important in portable and mobile  
applications. When VCC = 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of  
the device. No damage occurs to the device under these conditions.  
The SN74AUP1T98 is designed with optimized current-drive capability of 4 mA to reduce line reflections,  
overshoot, and undershoot caused by high-drive outputs.  
Nanostar™ and Nanofree™ package technology is a major breakthrough in IC packaging concepts, using the die  
as the package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar, NanoFree are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2004–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

SN74AUP1T58 替代型号

型号 品牌 替代类型 描述 数据表
SN74AUP1T57 TI

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SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS
SN74AUP1T98 TI

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SN74AUP1T97 TI

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