5秒后页面跳转
捷配首页

Datasheet > 逻辑 > 其他逻辑集成电路> SN74AUP1G57DRYR
SN74AUP1G57DRYR PDF预览

SN74AUP1G57DRYR

更新时间： 2024-10-02 05:24:51
品牌 Logo 应用领域
德州仪器 - TI 触发器逻辑集成电路光电二极管栅PC
页数 文件大小 规格书
18页 548K
描述
LOW-POWER CONFIGURABLE MULTIPLE-FUNCTION GATE

阅读下载

中文翻译

获取价格

SN74AUP1G57DRYR 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：SON
包装说明：SON-6针数：6
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：6 weeks
风险等级：1.6Samacsys Confidence：
Samacsys Status：ReleasedSamacsys PartID：606876
Samacsys Pin Count：6Samacsys Part Category：Integrated Circuit
Samacsys Package Category：OtherSamacsys Footprint Name：SON50P100X145X60-6N
Samacsys Released Date：2017-01-12 12:59:53Is Samacsys：N
系列：AUP/ULP/VJESD-30 代码：R-PDSO-N6
JESD-609代码：e4长度：1.45 mm
负载电容（CL）：30 pF逻辑集成电路类型：LOGIC CIRCUIT
最大I（ol）：0.004 A湿度敏感等级：1
功能数量：1端子数量：6
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：VSON
封装等效代码：SOLCC6,.04,20封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, VERY THIN PROFILE包装方法：TR
峰值回流温度（摄氏度）：260电源：1.2/3.3 V
Prop。Delay @ Nom-Sup：26.5 ns认证状态：Not Qualified
施密特触发器：YES座面最大高度：0.6 mm
子类别：Gates最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：0.8 V标称供电电压 (Vsup)：1.2 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：NO LEAD端子节距：0.5 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：1 mmBase Number Matches：1

SN74AUP1G57DRYR 数据手册

 浏览型号SN74AUP1G57DRYR的Datasheet PDF文件第2页浏览型号SN74AUP1G57DRYR的Datasheet PDF文件第3页浏览型号SN74AUP1G57DRYR的Datasheet PDF文件第4页浏览型号SN74AUP1G57DRYR的Datasheet PDF文件第5页浏览型号SN74AUP1G57DRYR的Datasheet PDF文件第6页浏览型号SN74AUP1G57DRYR的Datasheet PDF文件第7页 
SN74AUP1G57  
LOW-POWER CONFIGURABLE MULTIPLE-FUNCTION GATE  
www.ti.com  
SCES503G–NOVEMBER 2003–REVISED APRIL 2007  
FEATURES  
•
•
•
Available in the Texas Instruments  
NanoFree™ Packages  
•
3.6-V I/O Tolerant to Support Mixed-Mode  
Signal Operation  
Low Static-Power Consumption  
(ICC = 0.9 µA Max)  
•
•
•
tpd = 5.3 ns Max at 3.3 V  
Suitable for Point-to-Point Applications  
Low Dynamic-Power Consumption  
(Cpd = 4.3 pF Typ at 3.3 V)  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
•
•
Low Input Capacitance (Ci = 1.5 pF Typ)  
•
ESD Performance Tested Per JESD 22  
Low Noise – Overshoot and Undershoot  
<10% of VCC  
–
2000-V Human-Body Model  
(A114-B, Class II)  
•
Ioff Supports Partial-Power-Down Mode  
Operation  
–
–
200-V Machine Model (A115-A)  
1000-V Charged-Device Model (C101)  
•
•
•
Includes Schmitt-Trigger Inputs  
Wide Operating VCC Range of 0.8 V to 3.6 V  
Optimized for 3.3-V Operation  
•
ESD Protection Exceeds ±5000 V With  
Human-Body Model  
In1  
GND  
In0  
In1  
GND  
In0  
In2  
In2  
In2  
In1  
GND  
In0  
DRY PACKAGE  
(TOP VIEW)  
YZP PACKAGE  
(BOTTOM VIEW)  
YFP PACKAGE  
(BOTTOM VIEW)  
In0  
In0  
1
2
3
6
5
4
In1  
GND  
In0  
In2  
VCC  
Y
GND  
In1  
GND  
In1  
In2  
In2  
DESCRIPTION/ORDERING INFORMATION  
The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable  
applications. This family ensures a very low static and dynamic power consumption across the entire VCC range  
of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity,  
which produces very low undershoot and overshoot characteristics.  
The SN74AUP1G57 features configurable multiple functions. The output state is determined by eight patterns of  
3-bit input. The user can choose the logic functions AND, OR, NAND, NOR, XNOR, inverter, and noninverter. All  
inputs can be connected to VCC or GND.  
The device functions as an independent gate with Schmitt-trigger inputs, which allow for slow input transition  
and better switching noise immunity at the input.  
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the  
package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoFree is a trademark of Texas Instruments.  
UNLESS OTHERWISE NOTED this document contains  
Copyright © 2003–2007, Texas Instruments Incorporated  
PRODUCTION DATA information current as of publication date.  
Products conform to specifications per the terms of Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...18

中文翻译

下载PDF

与SN74AUP1G57DRYR相关器件

型号 品牌 获取价格 描述 数据表
SN74AUP1G57DSFR TI

获取价格

 		LOW-POWER CONFIGURABLE MULTIPLE-FUNCTION GATE
SN74AUP1G57YEPR TI

获取价格

 		LOW-POWER CONFIGURABLE MULTIPLE-FUNCTION GATE
SN74AUP1G57YFPR TI

获取价格

 		LOW-POWER CONFIGURABLE MULTIPLE-FUNCTION GATE
SN74AUP1G57YZPR TI

获取价格

 		LOW-POWER CONFIGURABLE MULTIPLE-FUNCTION GATE
SN74AUP1G58 TI

获取价格

 		LOW-POWER CONFIGURABLE MULTIPLE-FUNCTION GATE
SN74AUP1G58_08 TI

获取价格

 		LOW-POWER CONFIGURABLE MULTIPLE-FUNCTION GATE
SN74AUP1G58_10 TI

获取价格

 		LOW-POWER CONFIGURABLE MULTIPLE-FUNCTION GATE
SN74AUP1G58DBVR TI

获取价格

 		LOW-POWER CONFIGURABLE MULTIPLE-FUNCTION GATE
SN74AUP1G58DBVRE4 TI

获取价格

 		LOW-POWER CONFIGURABLE MULTIPLE-FUNCTION GATE
SN74AUP1G58DBVRG4 TI

获取价格

 		LOW-POWER CONFIGURABLE MULTIPLE-FUNCTION GATE

与SN74AUP1G57DRYR相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证