Datasheet > SN74AUP1G00_07

SN74AUP1G00_07

更新时间： 2024-11-02 05:04:51

品牌	Logo	应用领域
德州仪器 - TI		输入元件
页数	文件大小	规格书
17页	552K
描述
LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE

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SN74AUP1G00_07 数据手册

SN74AUP1G00

LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE

www.ti.com

SCES604E–SEPTEMBER 2004–REVISED MAY 2007

FEATURES

•

Available in the Texas Instruments

NanoFree™ Package

•

Optimized for 3.3-V Operation

3.6-V I/O Tolerant to Support Mixed-Mode

Signal Operation

Low Static-Power Consumption

(I_CC= 0.9 µA Max)

•

t_pd= 4.8 ns Max at 3.3 V

Low Dynamic-Power Consumption

(C_pd= 4 pF Typ at 3.3 V)

Suitable for Point-to-Point Applications

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

•

Low Input Capacitance (C_i= 1.5 pF Typ)

Low Noise Overshoot and Undershoot

<10% of V_CC

•

ESD Performance Tested Per JESD 22

–

2000-V Human-Body Model

(A114-B, Class II)

•

I_offSupports Partial-Power-Down Mode

Operation

–

200-V Machine Model (A115-A)

Input Hysteresis Allows Slow Input Transition

and Better Switching Noise Immunity at Input

(V_hys= 250 mV Typ at 3.3 V)

1000-V Charged-Device Model (C101)

•

ESD Protection Exceeds ±5000 V With

Human-Body Model

•

Wide Operating V_CCRange of 0.8 V to 3.6 V

YFP PACKAGE

(BOTTOM VIEW)

DRY PACKAGE

(TOP VIEW)

GND

V_CC

DNU

V_CC

GND

DNU – Do not use

NC – No internal connection

See mechanical drawings for dimensions.

DESCRIPTION/ORDERING INFORMATION

The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable

applications. This family ensures a very low static and dynamic power consumption across the entire V_CCrange

of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see

Figure 1 and Figure 2).

This single 2-input positive-NAND gate performs the Boolean function Y = A • B or Y = A + B in positive logic.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the

package.

This device is fully specified for partial-power-down applications using I_off. The I_offcircuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoFree is a trademark of Texas Instruments.

UNLESS OTHERWISE NOTED this document contains

PRODUCTION DATA information current as of publication date.

Products conform to specifications per the terms of Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...17

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与SN74AUP1G00_07相关器件

型号	品牌	获取价格	描述	数据表
SN74AUP1G00_101	TI	获取价格	LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE
SN74AUP1G00DBVR	TI	获取价格	LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE
SN74AUP1G00DBVRE4	TI	获取价格	LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE
SN74AUP1G00DBVRG4	TI	获取价格	LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE
SN74AUP1G00DBVT	TI	获取价格	LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE
SN74AUP1G00DBVTE4	TI	获取价格	LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE
SN74AUP1G00DBVTG4	TI	获取价格	LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE
SN74AUP1G00DCKR	TI	获取价格	LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE
SN74AUP1G00DCKRE4	TI	获取价格	LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE
SN74AUP1G00DCKRG4	TI	获取价格	LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE

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