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SN74AUC1G08_10 PDF预览

SN74AUC1G08_10

更新时间： 2024-11-24 11:48:19
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德州仪器 - TI 输入元件
页数 文件大小 规格书
14页 626K
描述
SINGLE 2-INPUT POSITIVE-AND GATE

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SN74AUC1G08_10 数据手册

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SN74AUC1G08  
SINGLE 2-INPUT POSITIVE-AND GATE  
www.ti.com  
SCES374O–SEPTEMBER 2001–REVISED APRIL 2007  
FEATURES  
•
Available in the Texas Instruments  
NanoFree™ Package  
•
•
•
Low Power Consumption, 10-µA Max ICC  
±8-mA Output Drive at 1.8 V  
•
Optimized for 1.8-V Operation and Is 3.6-V I/O  
Tolerant to Support Mixed-Mode Signal  
Operation  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
•
ESD Protection Exceeds JESD 22  
•
Ioff Supports Partial-Power-Down Mode  
Operation  
–
–
–
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
•
•
Sub-1-V Operable  
1000-V Charged-Device Model (C101)  
Max tpd of 2.4 ns at 1.8 V  
DBV PACKAGE  
(TOP VIEW)  
DCK PACKAGE  
(TOP VIEW)  
DRL PACKAGE  
(TOP VIEW)  
VCC  
A
B
1
2
3
5
1
2
3
5
4
A
B
VCC  
1
2
3
5
A
B
VCC  
GND  
Y
4
GND  
Y
4
Y
GND  
DRY PACKAGE  
(TOP VIEW)  
YZP PACKAGE  
(BOTTOM VIEW)  
3
4
Y
1
2
3
6
5
4
GND  
B
A
B
VCC  
2
1
NC  
Y
5
VCC  
A
GND  
See mechanical drawings for dimensions.  
NC – No internal connection  
DESCRIPTION/ORDERING INFORMATION  
This single 2-input positive-AND gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V  
to 1.95-V VCC operation.  
Y + A • B or Y + A ) B  
The SN74AUC1G08 performs the Boolean function  
in positive logic.  
ORDERING INFORMATION  
TA  
PACKAGE(1)(2)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING(3)  
NanoFree™ – WCSP (DSBGA)  
0.23-mm Large Bump – YZP (Pb-free)  
Reel of 3000  
SN74AUC1G08YZPR  
_ _ _UE_  
SON – DRY  
Reel of 5000  
Reel of 3000  
Reel of 3000  
SN74AUC1G08DRYR  
SN74AUC1G08DBVR  
SN74AUC1G08DCKR  
PREVIEW  
U08_  
–40°C to 85°C  
SOT (SOT-23) – DBV  
SOT (SC-70) – DCK  
UE_  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
website at www.ti.com.  
(3) DBV/DCK/DRY: The actual top-side marking has one additional character that designates the assembly/test site.  
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following  
character to designate the assembly/test site.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoFree is a trademark of Texas Instruments.  
UNLESS OTHERWISE NOTED this document contains  
Copyright © 2001–2007, Texas Instruments Incorporated  
PRODUCTION DATA information current as of publication date.  
Products conform to specifications per the terms of Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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