5秒后页面跳转
捷配首页

Datasheet > 逻辑 > 总线驱动器/收发器> SN74AUC1G125YEPR
SN74AUC1G125YEPR PDF预览

SN74AUC1G125YEPR

更新时间： 2024-11-01 22:19:11
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路输出元件
页数 文件大小 规格书
13页 317K
描述
SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

阅读下载

中文翻译

获取价格

SN74AUC1G125YEPR 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：BGA包装说明：DSBGA-5
针数：5Reach Compliance Code：not_compliant
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：5.28Is Samacsys：N
控制类型：ENABLE LOW系列：AUC
JESD-30 代码：R-XBGA-B5长度：1.4 mm
逻辑集成电路类型：BUS DRIVER最大I（ol）：0.005 A
位数：1功能数量：1
端口数量：2端子数量：5
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：UNSPECIFIED封装代码：VFBGA
封装等效代码：BGA5,2X3,20封装形状：RECTANGULAR
封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH包装方法：TAPE AND REEL
峰值回流温度（摄氏度）：NOT SPECIFIED电源：1.2/2.5 V
传播延迟（tpd）：3.6 ns认证状态：Not Qualified
座面最大高度：0.5 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：2.7 V最小供电电压 (Vsup)：0.8 V
标称供电电压 (Vsup)：1.2 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：BALL端子节距：0.5 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：0.9 mmBase Number Matches：1

SN74AUC1G125YEPR 数据手册

 浏览型号SN74AUC1G125YEPR的Datasheet PDF文件第2页浏览型号SN74AUC1G125YEPR的Datasheet PDF文件第3页浏览型号SN74AUC1G125YEPR的Datasheet PDF文件第4页浏览型号SN74AUC1G125YEPR的Datasheet PDF文件第5页浏览型号SN74AUC1G125YEPR的Datasheet PDF文件第6页浏览型号SN74AUC1G125YEPR的Datasheet PDF文件第7页 
SN74AUC1G125  
SINGLE BUS BUFFER GATE  
WITH 3-STATE OUTPUT  
SCES382G – MARCH 2002 – REVISED JUNE 2003  
DBV OR DCK PACKAGE  
(TOP VIEW)  
Available in the Texas Instruments  
NanoStarand NanoFreePackages  
Optimized for 1.8-V Operation and Is 3.6-V  
I/O Tolerant to Support Mixed-Mode Signal  
Operation  
1
2
3
5
4
OE  
A
GND  
V
Y
CC  
I
Supports Partial-Power-Down Mode  
off  
Operation  
YEA, YEP, YZA, OR YZP PACKAGE  
(BOTTOM VIEW)  
Sub 1-V Operable  
Max t of 2.5 ns at 1.8 V  
pd  
Low Power Consumption, 10-µA Max I  
3 4  
2
GND  
A
OE  
Y
V
CC  
8-mA Output Drive at 1.8 V  
1 5  
CC  
Latch-Up Performance Exceeds 100 mA  
Per JESD 78, Class II  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
description/ordering information  
This bus buffer gate is operational at 0.8-V to 2.7-V V , but is designed specifically for 1.65-V to 1.95-V V  
CC  
operation.  
CC  
The SN74AUC1G125 is a single line driver with a 3-state output. The output is disabled when the output-enable  
(OE) input is high.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
‡
NanoStar  
SN74AUC1G125YEAR  
SN74AUC1G125YZAR  
SN74AUC1G125YEPR  
SN74AUC1G125YZPR  
WCSP (DSBGA) – YEA  
NanoFree  
WCSP (DSBGA) – YZA (Pb-free)  
Tape and reel  
_ _ _UM_  
NanoStar– WCSP (DSBGA)  
0.23-mm Large Bump – YEP  
–40°C to 85°C  
NanoFree– WCSP (DSBGA)  
0.23-mm Large Bump – YZP (Pb-free)  
SOT (SOT-23) – DBV  
Tape and reel SN74AUC1G125DBVR  
Tape and reel SN74AUC1G125DCKR  
U25_  
UM_  
SOT (SC-70) – DCK  
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.  
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code,  
and one following character to designate the assembly/test site.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar and NanoFree are trademarks of Texas Instruments.  
Copyright 2003, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...13

中文翻译

下载PDF

SN74AUC1G125YEPR 替代型号

型号 品牌 替代类型 描述 数据表
74AUC1G125DBVRE4 TI

完全替代

 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
SN74AUC1G126DBVR TI

完全替代

 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

与SN74AUC1G125YEPR相关器件

型号 品牌 获取价格 描述 数据表
SN74AUC1G125YZAR TI

获取价格

 		SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
SN74AUC1G125YZPR TI

获取价格

 		SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
SN74AUC1G125YZTR TI

获取价格

 		SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
SN74AUC1G126 TI

获取价格

 		SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
SN74AUC1G126_07 TI

获取价格

 		SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
SN74AUC1G126DBVR TI

获取价格

 		SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
SN74AUC1G126DCKR TI

获取价格

 		SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
SN74AUC1G126DRYR TI

获取价格

 		AUC SERIES, 1-BIT DRIVER, TRUE OUTPUT, DSO6, SON-6
SN74AUC1G126YEAR TI

获取价格

 		AUC SERIES, 1-BIT DRIVER, TRUE OUTPUT, PBGA5, DSBGA-5
SN74AUC1G126YEPR TI

获取价格

 		SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

与SN74AUC1G125YEPR相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证