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SN74AUC1G125 PDF预览

SN74AUC1G125

更新时间： 2024-02-11 20:54:41
品牌 Logo 应用领域
德州仪器 - TI 输出元件
页数 文件大小 规格书
13页 317K
描述
SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

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SN74AUC1G125 数据手册

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SN74AUC1G125  
SINGLE BUS BUFFER GATE  
WITH 3-STATE OUTPUT  
SCES382G – MARCH 2002 – REVISED JUNE 2003  
DBV OR DCK PACKAGE  
(TOP VIEW)  
Available in the Texas Instruments  
NanoStarand NanoFreePackages  
Optimized for 1.8-V Operation and Is 3.6-V  
I/O Tolerant to Support Mixed-Mode Signal  
Operation  
1
2
3
5
4
OE  
A
GND  
V
Y
CC  
I
Supports Partial-Power-Down Mode  
off  
Operation  
YEA, YEP, YZA, OR YZP PACKAGE  
(BOTTOM VIEW)  
Sub 1-V Operable  
Max t of 2.5 ns at 1.8 V  
pd  
Low Power Consumption, 10-µA Max I  
3 4  
2
GND  
A
OE  
Y
V
CC  
8-mA Output Drive at 1.8 V  
1 5  
CC  
Latch-Up Performance Exceeds 100 mA  
Per JESD 78, Class II  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
description/ordering information  
This bus buffer gate is operational at 0.8-V to 2.7-V V , but is designed specifically for 1.65-V to 1.95-V V  
CC  
operation.  
CC  
The SN74AUC1G125 is a single line driver with a 3-state output. The output is disabled when the output-enable  
(OE) input is high.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
‡
NanoStar  
SN74AUC1G125YEAR  
SN74AUC1G125YZAR  
SN74AUC1G125YEPR  
SN74AUC1G125YZPR  
WCSP (DSBGA) – YEA  
NanoFree  
WCSP (DSBGA) – YZA (Pb-free)  
Tape and reel  
_ _ _UM_  
NanoStar– WCSP (DSBGA)  
0.23-mm Large Bump – YEP  
–40°C to 85°C  
NanoFree– WCSP (DSBGA)  
0.23-mm Large Bump – YZP (Pb-free)  
SOT (SOT-23) – DBV  
Tape and reel SN74AUC1G125DBVR  
Tape and reel SN74AUC1G125DCKR  
U25_  
UM_  
SOT (SC-70) – DCK  
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.  
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code,  
and one following character to designate the assembly/test site.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar and NanoFree are trademarks of Texas Instruments.  
Copyright 2003, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...13

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SN74AUC1G125 替代型号

型号 品牌 替代类型 描述 数据表
SN74AUP1G125 TI

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