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SN74ALVC7814-20DL PDF预览

SN74ALVC7814-20DL

更新时间： 2024-11-25 20:51:51
品牌 Logo 应用领域
德州仪器 - TI 先进先出芯片光电二极管
页数 文件大小 规格书
9页 276K
描述
64X18 OTHER FIFO, PDSO56

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中文翻译

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SN74ALVC7814-20DL 技术参数

生命周期：Obsolete包装说明：SSOP,
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.32.00.71风险等级：5.79
JESD-30 代码：R-PDSO-G56长度：18.415 mm
内存密度：1152 bit内存宽度：18
功能数量：1端子数量：56
字数：64 words字数代码：64
工作模式：SYNCHRONOUS组织：64X18
输出特性：3-STATE封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH并行/串行：PARALLEL
认证状态：Not Qualified座面最大高度：2.79 mm
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS端子形式：GULL WING
端子节距：0.635 mm端子位置：DUAL
宽度：7.5 mmBase Number Matches：1

SN74ALVC7814-20DL 数据手册

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SCES624 − FEBRUARY 2005  
DBB PACKAGE  
(TOP VIEW)  
D
D
Member of the Texas Instruments  
WidebusFamily  
Output Ports Have Series Damping  
Resistors, So No External Resistors Are  
Required  
2Y2  
1Y2  
GND  
2Y1  
1Y3  
2Y3  
GND  
1Y4  
2Y4  
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Diodes on Inputs Clamp Overshoot  
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Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
1Y1  
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V
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CC  
CC  
A1  
A2  
GND  
A3  
A4  
GND  
A5  
A6  
1Y5  
2Y5  
GND  
1Y6  
2Y6  
GND  
1Y7  
2Y7  
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Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
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ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
description/ordering information  
V
V
CC  
CC  
This 1-bit to 2-bit address driver is designed for  
A7  
A8  
GND  
A9  
OE1  
OE2  
A10  
GND  
A11  
A12  
1Y8  
2Y8  
GND  
1Y9  
2Y9  
1Y10  
2Y10  
GND  
1Y11  
2Y11  
2.3-V to 3.6-V V  
operation.  
CC  
Diodes to V  
clamp overshoot.  
have been added on the inputs to  
CC  
Active bus-hold circuitry holds unused or undriven  
inputs at a valid logic state. Use of pullup or  
pulldown resistors with the bus-hold circuitry is not  
recommended.  
The outputs, which are designed to sink up to  
12 mA, include series damping resistors to reduce  
overshoot and undershoot.  
V
V
CC  
CC  
A13  
A14  
GND  
A15  
A16  
GND  
A17  
A18  
1Y12  
2Y12  
GND  
1Y13  
2Y13  
GND  
1Y14  
2Y14  
The ALVCHS162830A is an improved version of  
the LVCHS162830 (non-A version) and has been  
optimized for lower power consumption and  
higher AC drive. Higher AC drive provides  
capability to drive loads with a faster edge rate.  
To ensure the high-impedance state during power  
up or power down, the output-enable (OE) input  
V
V
CC  
CC  
should be tied to V  
through a pullup resistor; the  
2Y18  
1Y18  
GND  
2Y17  
1Y17  
1Y15  
2Y15  
GND  
1Y16  
2Y16  
CC  
minimum value of the resistor is determined by the  
current-sinking capability of the driver.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
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Copyright 2005, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

中文翻译

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