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SN74ALS164ANSRG4 PDF预览

SN74ALS164ANSRG4

更新时间: 2024-11-12 15:52:07
品牌 Logo 应用领域
德州仪器 - TI 输入元件光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
14页 652K
描述
ALS SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO14, GREEN, PLASTIC, SOP-14

SN74ALS164ANSRG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP14,.3针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.74其他特性:AND-GATED SERIAL (A AND B) INPUTS
计数方向:RIGHT系列:ALS
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:10.2 mm逻辑集成电路类型:SERIAL IN PARALLEL OUT
最大频率@ Nom-Sup:50000000 Hz湿度敏感等级:1
位数:8功能数量:1
端子数量:14最高工作温度:70 °C
最低工作温度:输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:5 V传播延迟(tpd):17 ns
认证状态:Not Qualified座面最大高度:2 mm
子类别:Shift Registers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:COMMERCIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:5.3 mm
最小 fmax:75 MHzBase Number Matches:1

SN74ALS164ANSRG4 数据手册

 浏览型号SN74ALS164ANSRG4的Datasheet PDF文件第2页浏览型号SN74ALS164ANSRG4的Datasheet PDF文件第3页浏览型号SN74ALS164ANSRG4的Datasheet PDF文件第4页浏览型号SN74ALS164ANSRG4的Datasheet PDF文件第5页浏览型号SN74ALS164ANSRG4的Datasheet PDF文件第6页浏览型号SN74ALS164ANSRG4的Datasheet PDF文件第7页 
ꢀꢁ ꢂꢃ ꢄꢅ ꢀꢆ ꢇꢃ ꢄ  
ꢈ ꢉꢊꢋ ꢌꢍ ꢎꢄꢏꢄ ꢅꢅ ꢐꢅ ꢉꢑ ꢒꢌ ꢍꢀ ꢐꢏꢋ ꢄꢅꢍꢀ ꢓꢋꢔ ꢌ ꢍꢏꢐ ꢕ ꢋ ꢀꢌ ꢐꢏ  
SDAS159D − APRIL 1982 − REVISED DECEMBER 1994  
D OR N PACKAGE  
(TOP VIEW)  
AND-Gated (Enable/Disable) Serial Inputs  
Fully Buffered Clock and Serial Inputs  
Direct Clear  
A
B
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
Package Options Include Plastic  
Small-Outline (D) Packages and Standard  
Plastic (N) 300-mil DIPs  
Q
Q
Q
Q
CLR  
CLK  
H
G
F
Q
Q
Q
A
B
C
D
E
description  
Q
GND  
8
This 8-bit parallel-out serial shift register features  
AND-gated serial (A and B) inputs and an  
asynchronous clear (CLR) input. The gated serial  
inputs permit control over incoming data because a low at either input inhibits entry of the new data and resets  
the first flip-flop to the low level at the next clock pulse. A high-level input enables the other input, which  
determines the state of the first flip-flop. Data at the serial inputs can be changed while the clock is high or low,  
provided that the minimum setup-time requirements are met. Clocking occurs on the low-to-high-level transition  
of the clock (CLK) input. All inputs are diode clamped to minimize transmission-line effects.  
The SN74ALS164A is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
CLR  
L
CLK  
A
X
X
H
L
B
X
X
H
X
L
Q
Q
B
. . . Q  
A
H
X
L
L
L
L
H
Q
Q
Q
H0  
Q
Gn  
Q
Gn  
Q
Gn  
A0  
B0  
An  
An  
An  
H
H
L
L
Q
Q
Q
H
H
X
Q
, Q , Q = the level of Q , Q , or Q , respectively,  
A0 B0 H0 A B H  
before the indicated steady-state input conditions were  
established.  
H = high level (steady state), L = low level (steady state)  
X = irrelevant (any input, including transitions)  
= transition from low to high level  
Q
, Q = the level of Q or Q before the most recent  
An Gn A G  
transition of the clock; indicates a 1-bit shift.  
ꢌꢤ  
Copyright 1994, Texas Instruments Incorporated  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

SN74ALS164ANSRG4 替代型号

型号 品牌 替代类型 描述 数据表
SN74ALS164ANSR TI

完全替代

8-Bit Parallel-Out Serial Shift Registers 14-SO 0 to 70

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