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SN74AHCT1G125_16 PDF预览

SN74AHCT1G125_16

更新时间: 2024-11-05 02:58:15
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德州仪器 - TI
页数 文件大小 规格书
13页 574K
描述
Single Bus Buffer Gate With 3-State Output

SN74AHCT1G125_16 数据手册

 浏览型号SN74AHCT1G125_16的Datasheet PDF文件第2页浏览型号SN74AHCT1G125_16的Datasheet PDF文件第3页浏览型号SN74AHCT1G125_16的Datasheet PDF文件第4页浏览型号SN74AHCT1G125_16的Datasheet PDF文件第5页浏览型号SN74AHCT1G125_16的Datasheet PDF文件第6页浏览型号SN74AHCT1G125_16的Datasheet PDF文件第7页 
ꢀꢁꢂ ꢃ ꢄꢅꢆ ꢇꢈ ꢉ ꢈꢊꢋ  
ꢀꢌ ꢁꢉ ꢍ ꢎ ꢏꢐꢀ ꢏꢐꢑ ꢑ ꢎ ꢒ ꢉ ꢄꢇꢎ  
ꢓ ꢌꢇ ꢅ ꢔ ꢕꢀꢇꢄꢇ ꢎ ꢖ ꢐꢇ ꢗꢐ ꢇ  
SCLS378L − AUGUST 1997 − REVISED JUNE 2005  
D
D
D
D
Operating Range of 4.5 V to 5.5 V  
D
D
Inputs Are TTL-Voltage Compatible  
Max t of 6 ns at 5 V  
pd  
Low Power Consumption, 10-µA Max I  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
CC  
8-mA Output Drive at 5 V  
DBV PACKAGE  
(TOP VIEW)  
DCK PACKAGE  
(TOP VIEW)  
DRL PACKAGE  
(TOP VIEW)  
1
2
3
5
OE  
A
V
Y
CC  
1
2
3
5
OE  
A
V
Y
OE  
A
V
Y
1
2
3
5
CC  
CC  
4
GND  
4
GND  
4
GND  
See mechanical drawings for dimensions.  
description/ordering information  
The SN74AHCT1G125 is a single bus buffer gate/line driver with 3-state output. The output is disabled when  
the output-enable (OE) input is high. When OE is low, true data is passed from the A input to the Y output.  
To ensure the high-impedance state during power up or power down, OE should be tied to V  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup  
CC  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
Reel of 3000  
Reel of 250  
Reel of 3000  
Reel of 250  
Reel of 4000  
SN74AHCT1G125DBVR  
SN74AHCT1G125DBVT  
SN74AHCT1G125DCKR  
SN74AHCT1G125DCKT  
SN74AHCT1G125DRLR  
SOT (SOT-23) − DBV  
B25_  
−40°C to 85°C  
SOT (SC-70) − DCK  
BM_  
BM_  
SOT (SOT-553) − DRL  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
The actual top-side marking has one additional character that designates the assembly/test site.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
L
L
H
L
H
X
Z
logic diagram (positive logic)  
1
2
OE  
A
4
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢇꢤ  
Copyright 2005, Texas Instruments Incorporated  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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