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SN74AHCT1G125DBV PDF预览

SN74AHCT1G125DBV

更新时间: 2024-11-04 23:09:43
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
5页 73K
描述
SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

SN74AHCT1G125DBV 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:PLASTIC, SO-5针数:5
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.56Is Samacsys:N
系列:AHCT/VHCTJESD-30 代码:R-PDSO-G5
长度:2.9 mm逻辑集成电路类型:BUS DRIVER
位数:1功能数量:1
端口数量:2端子数量:5
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:LSSOP
封装等效代码:TSOP5/6,.11,37封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, LOW PROFILE, SHRINK PITCH传播延迟(tpd):8.5 ns
认证状态:Not Qualified座面最大高度:1.45 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.95 mm
端子位置:DUAL宽度:1.6 mm
Base Number Matches:1

SN74AHCT1G125DBV 数据手册

 浏览型号SN74AHCT1G125DBV的Datasheet PDF文件第2页浏览型号SN74AHCT1G125DBV的Datasheet PDF文件第3页浏览型号SN74AHCT1G125DBV的Datasheet PDF文件第4页浏览型号SN74AHCT1G125DBV的Datasheet PDF文件第5页 
SN74AHCT1G125  
SINGLE BUS BUFFER GATE  
WITH 3-STATE OUTPUT  
SCLS378F – AUGUST 1997 – REVISED JANUARY 2000  
DBV OR DCK PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) Process  
Inputs Are TTL-Voltage Compatible  
OE  
A
GND  
V
Y
1
2
3
5
4
CC  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Package Options Include Plastic  
Small-Outlline Transistor (DBV, DCK)  
Packages  
description  
The SN74AHCT1G125 is a single bus buffer gate/line driver with 3-state output. The output is disabled when  
the output-enable (OE) input is high. When OE is low, true data is passed from the A input to the Y output.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
The SN74AHCT1G125 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
L
L
H
L
H
X
Z
logic symbol  
1
2
OE  
A
EN  
4
Y
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  
logic diagram (positive logic)  
1
2
OE  
A
4
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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