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SN74ABT841ANSR PDF预览

SN74ABT841ANSR

更新时间: 2024-11-07 19:59:59
品牌 Logo 应用领域
德州仪器 - TI 驱动信息通信管理光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
21页 832K
描述
ABT SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24, GREEN, PLASTIC, SOP-24

SN74ABT841ANSR 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP24,.3
针数:24Reach Compliance Code:unknown
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.78系列:ABT
JESD-30 代码:R-PDSO-G24长度:15 mm
逻辑集成电路类型:BUS DRIVER最大I(ol):0.064 A
位数:10功能数量:1
端口数量:2端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP24,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):38 mAProp。Delay @ Nom-Sup:6.2 ns
传播延迟(tpd):6.7 ns认证状态:Not Qualified
座面最大高度:2 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:BICMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5.3 mmBase Number Matches:1

SN74ABT841ANSR 数据手册

 浏览型号SN74ABT841ANSR的Datasheet PDF文件第2页浏览型号SN74ABT841ANSR的Datasheet PDF文件第3页浏览型号SN74ABT841ANSR的Datasheet PDF文件第4页浏览型号SN74ABT841ANSR的Datasheet PDF文件第5页浏览型号SN74ABT841ANSR的Datasheet PDF文件第6页浏览型号SN74ABT841ANSR的Datasheet PDF文件第7页 
SN54ABT841, SN74ABT841A  
10-BIT BUS-INTERFACE D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
SCBS196D – FEBRUARY 1991 – REVISED MAY 1997  
SN54ABT841 . . . JT OR W PACKAGE  
SN74ABT841A . . . DB, DW, NT, OR PW PACKAGE  
(TOP VIEW)  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
1
2
3
4
5
6
7
8
9
24  
V
CC  
23 1Q  
22 2Q  
21 3Q  
20 4Q  
19 5Q  
18 6Q  
17 7Q  
16 8Q  
15 9Q  
14 10Q  
13 LE  
Latch-Up Performance Exceeds 500 mA Per  
JEDEC Standard JESD-17  
Typical V  
(Output Ground Bounce) < 1 V  
OLP  
at V  
= 5 V, T = 25°C  
CC  
A
High-Impedance State During Power Up  
and Power Down  
High-Drive Outputs (–32-mA I , 64-mA I  
OH  
)
OL  
9D 10  
10D 11  
GND 12  
Package Options Include Plastic  
Small-Outline (DW), Shrink Small-Outline  
(DB), and Thin Shrink Small-Outline (PW)  
Packages, Ceramic Chip Carriers (FK),  
Ceramic Flat (W) Package, and Plastic (NT)  
and Ceramic (JT) DIPs  
SN54ABT841 . . . FK PACKAGE  
(TOP VIEW)  
description  
4
3
2
1 28 27 26  
25  
The SN54ABT841 and SN74ABT841A 10-bit  
latches are designed specifically for driving highly  
capacitive or relatively low-impedance loads.  
They are particularly suitable for implementing  
buffer registers, I/O ports, bidirectional bus  
drivers, and working registers.  
5
3D  
4D  
5D  
NC  
6D  
7D  
8D  
3Q  
4Q  
5Q  
NC  
6Q  
7Q  
8Q  
6
24  
23  
22  
21  
20  
19  
7
8
9
10  
11  
The ten transparent D-type latches provide true  
data at their outputs.  
12 13 14 15 16 17 18  
A buffered output-enable (OE) input can be used  
to place the ten outputs in either a normal logic  
state (high or low logic levels) or  
a
NC – No internal connection  
high-impedance state. In the high-impedance  
state, the outputs neither load nor drive the bus  
lines significantly. The high-impedance state and  
increased drive provide the capability to drive bus  
lines without need for interface or pullup  
components.  
OE does not affect the internal operations of the latch. Previously stored data can be retained or new data can  
be entered while the outputs are in the high-impedance state.  
When V  
is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.  
CC  
However, to ensure the high-impedance state above 2.1 V, OE should be tied to V  
the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup resistor;  
CC  
The SN54ABT841 is characterized for operation over the full military temperature range of –55°C to 125°C. The  
SN74ABT841A is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.  
Copyright 1997, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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